The functions of a reservoir offset voltage applied to physically defined p-channel Si quantum dots

We propose and define a reservoir offset voltage as a voltage commonly applied to both reservoirs of a quantum dot and study the functions in p-channel Si quantum dots. By the reservoir offset voltage, the electrochemical potential of the quantum dot can be modulated. In addition, when quantum dots in different channels are capacitively coupled, the reservoir offset voltage of one of the QDs can work as a gate voltage for the others. Our results show that the technique will lead to reduction of the number of gate electrodes, which is advantageous for future qubit integration.

The functions of a reservoir offset voltage applied to physically defined p-channel Si quantum dots Shimpei Nishiyama 1,2 , Kimihiko Kato 2 , Mizuki Kobayashi 1 , Raisei Mizokuchi 1 , Takahiro Mori 2 & Tetsuo Kodera 1* We propose and define a reservoir offset voltage as a voltage commonly applied to both reservoirs of a quantum dot and study the functions in p-channel Si quantum dots. By the reservoir offset voltage, the electrochemical potential of the quantum dot can be modulated. In addition, when quantum dots in different channels are capacitively coupled, the reservoir offset voltage of one of the QDs can work as a gate voltage for the others. Our results show that the technique will lead to reduction of the number of gate electrodes, which is advantageous for future qubit integration.
A spin in a Si quantum dot (QD) is an attractive system for implementing quantum information processing because it has a small qubit size and relatively long coherence times which come from a low abundance of nuclear spins in natural Si [1][2][3] . In addition, the mature conventional complementary metal-oxide-semiconductor (CMOS) fabrication process can be applied for Si QD fabrication, which should be advantageous for large-scale qubit integration [4][5][6] . Recently, several research groups have been studying various Si QD structures toward the integration of Si spin qubits [7][8][9][10][11][12] . One issue for the integration is that increasing the number of gate electrodes per qubit leads to increasing the number of wires from room temperature, which conflicts the limitation of space for wiring at cryogenic temperatures. In addition, characteristic variation among qubits will also become a problem for the integration 13,14 . To tackle these problems, we proposed and utilized a reservoir offset voltage which is a voltage commonly applied to both reservoirs of a QD. In the study of transistors, this voltage is understood to work as a relative gate voltage. Here, we apply the technique to QDs and thereby demonstrate the use of the reservoirs of a QD as gate electrode. We believe that the technique leads to a reduction of the number of gates without complicating structures.
Our group has been fabricating physically defined Si QD devices [15][16][17][18][19][20][21] , which enable the potential modulation methods using the reservoir offset voltage by taking advantages of the strong, sharp quantum confinements. In the present study, we confirm the operating principle of the reservoir offset voltage by simulation and applied the technique to p-channel QD devices. In p-channel Si QDs, hole spin manipulation is possible only with AC electric fields thanks to strong spin-orbit couplings of holes, which is advantageous for future qubit integration [22][23][24][25] . At first, we perform a band structure simulation to investigate the detailed mechanism of the reservoir offset voltage technique. Next, we experimentally demonstrate potential energy tuning in QDs by the reservoir offset voltage at 4.2 K and confirm that the operating principle shown in the simulation can explain the experimental results.

Results
Device and measurement setup. Figure 1a shows the experimental setup with a scanning electron microscope (SEM) image of a physically defined p-channel Si QD system. The fabrication process is in line with our previous studies [16][17][18][19][20][21] . At first, a 40 nm-thick silicon-on-insulator (SOI) substrate is etched to form single QD (SQD), double QD (DQD), and side gates (SGs) by reactive ion etching technique after electron beam lithography. Next, following thermal passivation of the Si surface, a 75 nm-thick SiO 2 layer and then a poly-Si top gate (TG) are deposited by low-pressure chemical vapor deposition technique. Then, to create Ohmic contacts, boron ions are implanted into SOI layer except for the part of SOI which is covered with TG with the accelerating voltage of 22 keV and a doping density of 1.1 × 10 20 cm −3 . Finally, forming gas annealing is performed to terminate dangling bonds at 420 °C for 3 h. The cross-sectional schematic of the QD device structure is shown in Fig. 1b. In our device structure, TG voltage accumulates holes in both SQD and DQD, and each SG voltage modifies the potential of the neighboring QD mainly. As described below, a reservoir offset voltage can be utilized to effec- www.nature.com/scientificreports/ tively tune the entire potential of a QD system (e.g. SQD or DQD system in this device). Therefore, the technique can be regarded to have a different function from the gates and potentially replaces TG and/or SG.
Band structure simulation model. In order to study the mechanism of the reservoir offset voltage technique, we calculated energy band structures employing HyENEXSS™ [26][27][28] . Here, we performed simulation using a simple p-channel MOS field effect transistor (MOSFET) model to study the changes in the energy bands and the number of holes induced in the reservoirs by the reservoir offset voltage (Fig. 2). As shown in Fig. 1b, the actual device structure except for QD is similar to a typical MOSFET structure, so that the change in the reservoir potential by the reservoir offset voltage qualitatively corresponds to that of the simulated MOSFET model. To confirm the effect of the reservoir offset voltage on the reservoirs, the lateral quantum confinement of the QD is not considered in this simulation. This means that the width of the Si channel is not considered for simplicity. The simulation temperature is chosen to be 300 K because the simulation at low temperatures has the  www.nature.com/scientificreports/ difficulty in convergence 29-31 due to the low intrinsic carrier density. Note that our target in the simulation is to grab the trend of the change in the energy band structures and the Fermi level by the reservoir offset voltage, so that the quantitative difference occurred by the different temperatures would not be critical for the conclusion. Even with such a simple simulation, the mechanism of the potential control by the reservoir offset voltage can be qualitatively understood.
Simulation results for the reservoir offset voltage measurement. Figure 3a shows the simulated I L -V g characteristics with V offset = 0 mV (black line) and 100 mV (orange line). We found that the threshold voltage shifts by about 100 mV. This is because the reservoir offset voltage causes a potential difference between the channel and the gate. In this case, the positive reservoir offset voltage is applied such that it accumulates holes. Typically, in MOS-based QD devices, Coulomb oscillations appear in the threshold region [32][33][34] . Therefore, the offset bias effect is confirmed for V g fixed close to the threshold voltage in the calculation of the energy bands. The valence band edge E V , the conduction band edge E C , and the Fermi level E F at Si surface along the channel direction at V g = 0 V are calculated with changing V offset from 0 to 100 mV as a simulation parameter. The results obtained for V offset = 0 mV (black), 50 mV (red), and 100 mV (orange) are shown in Fig. 3b. The energy bands shift to the negative direction along y axis by the positive reservoir offset voltage; in addition, the energy difference ∆E between E V and E F also changes at the same time. The number of induced holes at the Si/SiO 2 interface depends on ∆E. Figure 3c shows ∆E at the center of the channel on Si/SiO 2 interface as a function of the reservoir offset voltage V offset for V g = 0 V and V bias = 4 mV. It turned out that the increase of V offset reduces ∆E and thus increases the number of holes induced in reservoirs (Fig. 3d). Note that a moderate hole accumulation by V g is needed to observe the band edge difference by V offset in the simulations; ∆E ~ 0 for a stronger accumulation,  www.nature.com/scientificreports/ we consider the condition that an energy level of the SQD is in the bias window at V offset1 of 0 mV (red star in Fig. 4c). When V offset1 of 50 mV is applied, changing from the condition at the red star, a positive reservoir offset voltage shifts the Fermi levels into the direction that the hole number in the QD increases, which plays the same role as a negative gate voltage. On the other hand, the positive reservoir offset voltage accumulates holes in reservoirs and works like a positive gate voltage for the QD as well, through Coulomb repulsion (green circle in Fig. 4c).
In order to know how much energy shift occurs by reservoir offset voltage, a positive SG voltage is applied to compensate the energy shift. When the SG voltage compensation and the reservoir offset voltage are applied, the same Coulomb peak as without SG voltage compensation and reservoir offset voltage appears (blue triangle in Fig. 4c). Therefore, the potential shift of the SQD by the reservoir offset voltage, E QD , can be roughly estimated from the relation, E QD = α V g DQD , where α is the coupling strength between the SG and the SQD, and V g DQD is the SG voltage difference between two Coulomb peaks for the green-circle and blue-triangle conditions. For V offset1 of 50 mV, E QD is estimated to be ∼ 10 meV , where α ∼ 0.01 eV/V 18 and V g DQD = 950 mV . The shift is smaller than that of the Fermi level shift eV offset = 50 meV , which is attributed to the Coulomb coupling between the reservoirs and the SQD as mentioned above. From the energy difference between eV offset and E QD , E r−QD = eV offset − E QD ∼ 40 meV , the coupling strength between the reservoir and the SQD, α r−QD = �E r−QD /V offset is estimated to be 0.8 eV/V, which is compatible to that calculated from the parameters for the same type of the QD ( α r−QD = 0.7 eV/V) 18 . This is the principle of the potential modulation function of the reservoir offset voltage. The potential modulation function will facilitate the realization of the single-hole limit; it can reduce the number of holes while lowering the tunnel barrier heights. On the other hand, a side gate voltage can also reduce the number of holes but increases the barrier heights. This difference comes from the sign of the applied voltages and indicates an advantage of the reservoir offset voltage technique.

Gating function of the reservoir offset voltage.
To observe the other function of the reservoir offset voltage, gating function, we performed another measurement. In the measurement, we applied a reservoir offset voltage to an SQD and monitored the current flowing through the nearby DQD. Here, we expand the operating range of the reservoir offset voltage to hundreds of millivolts for visibility of the gating function. Figure 4d shows Coulomb peaks of DQD as a function of V offset1 , and they disappear as V offset1 increases, in analogy with SG voltage dependence. In our device, the DQD and SQD are physically isolated from each other but still electrostatically coupled. Therefore, as pointed out in Fig. 3c, V offset1 is considered to induce the gating effect by hole accumulation in the reservoirs of the SQD. From these results, we confirmed that not only SGs but also a QD can be used to tune the potential of another QD by applying the reservoir offset voltage, possibly leading to further reduction of the number of gates.

Conclusion
In conclusion, we study the functions of the reservoir offset voltages from simulation and experiments for physically defined p-channel Si QDs. We demonstrate that the reservoir offset voltages control the potentials of an SQD and a DQD relatively to the Fermi level, respectively. In addition, we observe that the reservoir offset voltage to the SQD works as a gate voltage for the adjacent DQD through Coulomb repulsion due to accumulated holes in the SQD reservoirs. From these results, we conclude that the reservoir offset voltage can lead to reduction of gate electrodes and/or flexibility of control in physically defined Si QD devices. We believe that this technique is advantageous also for other QDs based on different semiconductors, with strong isolation such as physically defined and nanowire-based QDs 35,36 .

Data availability
The datasets generated during and/or analysed during the current study are available from the corresponding author on reasonable request.