Electrical and dielectric parameters in TiO2-NW/Ge-NW heterostructure MOS device synthesized by glancing angle deposition technique

This paper reports the catalyst-free coaxial TiO2/Ge-nanowire (NW) heterostructure synthesis using the glancing angle deposition (GLAD) technique integrated into an electron beam evaporator. The frequency and voltage dependence of the capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of an Ag/TiO2-NW/Ge-NW/Si device over a wide range of frequency (10 kHz–5 MHz) and voltage (− 5 V to + 5 V) at room temperature were investigated. The study established strong dependence on the applied frequency and voltage bias. Both C–V and G/ω–V values showed wide dispersion in depletion region due to interface defect states (Dit) and series resistance (Rs). The C and G/ω value decreases with an increase in applied frequency. The voltage and frequency-dependent Dit and Rs were calculated from the Hill-Coleman and Nicollian–Brews methods, respectively. It is observed that the overall Dit and Rs for the device decrease with an increase in the frequency at different voltages. The dielectric properties such as dielectric constant (\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\upepsilon$$\end{document}ϵ′), loss (\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\upepsilon$$\end{document}ϵ″) and loss tangent (tan δ) were determined from the C–V and G/ω–V measurements. It is observed that \documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\upepsilon$$\end{document}ϵ′, \documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$\upepsilon$$\end{document}ϵ″ decreases with the increase in frequency. Therefore, the proposed MOS structure provides a promising alternative approach to enhance the device capability in the opto-electronics industry.

One-dimensional (1D) nanostructures like nanowires and nanorods have attracted huge interest over the last few decades in the field of metal oxide semiconductor (MOS) for various applications like photodetectors 1-6 , sensors 7,8 , photovoltaic systems 9 , non-volatile memory applications 10,11 etc. Following the Moore's law, the current semiconductor based MOS devices are facing a technological limitation in the form of scalability and leakage current. In order to further improve the MOS device performance, the International Technology Roadmap for semiconductors (ITRS) for future technology has recommended the use of a high mobility material as an alternative solution. In this context, recent papers have reported Germanium (Ge) with high-k dielectric based MOS devices which show good overall performance 12,13 . This is because Ge has high electron and hole mobility compared to silicon (Si) and a low band gap which enables operation at low voltage 14 . This feature, together with the opportunity to co-integrate Ge with high-k dielectrics such as Al 2 O 3 , HfO 2 , TiO 2 etc., makes Ge a practical candidate for future MOS device applications. However, the integration of Ge with a MOS capacitor is challenging due to the native unintentional formation of GeO x which is unstable compared to SiO 2 . This issue is mitigated by the integration of titanium dioxide (TiO 2 ) which is a high dielectric material with Ge. The unstable GeO x is reduced by the diffusion of Ge into the TiO 2 . At the same time, rutile-TiO 2 can be formed which has a high-dielectric constant 15 . Recent reports suggests that this approach can be achieved by various synthesis techniques for different applications [16][17][18] . Amongst these synthesis techniques, the glancing angle deposition (GLAD) is a catalyst free environment friendly technique which can synthesize numerous materials for various applications 2,19-21 . Furthermore, vertical nanowires can be easily achieved with the GLAD technique compared to other available techniques 22 .
In this work, a Ag/TiO 2 -NW/Ge-NW/Si (MOS) device is synthesized using the GLAD technique integrated into an electron-beam evaporator. The frequency and voltage dependence capacitance (C) and conductance

Results and discussion
The C-V and G/ω-V measurements of Ag/TiO 2 -NW/Ge-NW/Si MOS device are obtained for different frequencies and voltage ranges at room-temperature as shown in Fig. 1a,b. It is observed from Fig. 1a, that the MOS device displayed extensive distribution in depletion, inversion and accumulation regions. As seen in the figure, the MOS device showed an inversion region (-5 V to 0 V), a depletion region (0 V to 2 V) and an accumulation region (2 V to 5 V) at almost each frequency respectively. The voltage shift is due to the presence of surface states in the MOS device 23 . The measured capacitance (C) and conductance (G/ω) values showed strong dependence on frequency and voltage in the depletion region which might be due to the D it and R s in the MOS device. The decrease in C and G/ω with the increase in frequency as shown in Fig. 2a,b, might be because the D it cannot follow the alternating current (ac) signal at high frequencies and hence the contribution of these states to capacitance and conductance decrease with the increase in frequency 24 . This makes the contribution of interface state capacitance to the total capacitance negligible 25 . Thus, the measured C-V and G/ω-V values are close to the ideal case at high frequencies. At low frequency, the wide dispersion present in depletion region for both the C-V and G/ω-V curves is due to the existence of D it 26 . The electrical parameters D it and R s could have attributed to the deviation in both the C-V and G/ω-V curves from the ideal behaviour. The unsymmetrical growth of nanowires due to the shadowing effect inherent in the GLAD technique may have induced inhomogeneous contact during the metallization process between the metal contact and the semiconductor junction. This also could be the reason for the deviation from the ideal behaviour of the MOS device. The Nicollian and Brews method 25 is used to determine the parameters R s in the measured voltage range of the MOS device. This method is reported to be more precise in comparison with Norde and Cheung functions and conductance and admittance methods as per previous report 26 . R s is calculated using the Eq. (1) 25 given below: www.nature.com/scientificreports/ where C ma and G ma are the measured C and G for any biased voltage and ω is the angular frequency. Figure 3a,b, show the R s -V plots determined from Eq. 1. It is observed from Fig. 3a that R s decreases with an increase in frequency and the presence of peak around − 0.5 V to 1.3 V at low frequencies is due to the presence of D it . The changes in R s from region to region clearly shows that R s is dependent on both the applied frequency and voltage. The change in R s is evident especially in the inversion and depletion regions from the low to the high frequency range. It should be noted that R s is independent of frequency at the accumulation region from frequency greater than 30 kHz. Furthermore, the voltage dependent R s show almost constant value at higher frequencies (frequency > 200 kHz). This shows that for Ag/TiO 2 -NW/Ge-NW/Si (MOS) device, the R s is effective in the accumulation region in high voltage at high frequencies (frequency > 200 kHz). The D it is another parameter which affects the measured C-V and G/ω-V for the Ag/TiO 2 -NW/Ge-NW/Si (MOS) device. The frequency dependent D it plot can be obtained using the Hill-Coleman method from Eq. (2) 27 given below: where C ox and (G m /ω) max are the interlayer capacitance, maximum value of conductance which is corresponding to C m and the value of C ox can be calculated from the measured C and G/ω values at the strong accumulation region using Eq. (3) 28 as given below: www.nature.com/scientificreports/ The frequency dependent D it determined using Eqs. 2 and 3 is shown in Fig. 4. It is observed that the D it decreases with an increase in frequency for the Ag/TiO 2 -NW/Ge-NW/Si (MOS) device which is due to the low power follow rate at high frequencies 28 . Furthermore, the obtained D it value at high frequency ( frequency > 400 kHz) is found to be better in comparison with the reported values 17,29,30 and thus addresses the serious issue of high interface state densities. The distinct peak seen in the D it plot in Fig. 4 (inset) at 100 kHz and 300 kHz having D it values of 1.73 × 10 13 eV −1 cm −2 and 2.05 × 10 10 eV −1 cm −2 with defect lifetime of ~ 10 μs and 3.3 μs, respectively. The difference in the lifetime of the defects observed from the D it plot is primarily due to the slow traps and fast traps also known as interface traps corresponding to large defect lifetime and small defect lifetime, respectively 29 . It can be seen that the maximum value of C m decreases with an increase in R s which is in good agreement with the theoretical results stated by Chattopadhyay et al. 31 . Therefore, D it at low frequency in the Ag/TiO 2 -NW/Ge-NW/Si (MOS) device can follow the ac signal and yield an excess capacitance, thus resulting in D it being more pronounced compared to R s . In contrast to the low frequency values, the D it values at high frequency cannot follow the ac signal which makes the contribution of interface state capacitance to total capacitance negligible. This results in the contribution of R s being more pronounced.
In order to obtain the corrected capacitance (C c ) and corrected conductance (G c /ω) at different frequencies both measured C and G/ω are corrected considering the effect of series resistance (R s ) using the Eq. (4-6) 28 given below: www.nature.com/scientificreports/ Figure 5 represents the C C-V and G c /ω-V plots for the Ag/TiO 2 -NW/Ge-NW/Si (MOS) device. It is observed after making the correction that is considering the effect of R s in C c versus V plot, there is no significant change in the corrected capacitance (C c ) values. However in the case of the corrected conductance (G c ), it is observed that there is a decrease in the C c value with an increase in frequency and the existence of peaks in the G c /ω-V plot confirms the charge transfer taking place at the interface 28 .
The dependence of the dielectric constant ( ǫ′), dielectric loss ( ǫ ″) and dielectric loss tangent (tan(δ)) on the frequency and voltage are investigated in various frequencies (10 kHz to 5 MHz) at different voltage ranges (-5 V to 5 V) at room-temperature. The values of the dielectric constant ( ǫ ′) and dielectric loss ( ǫ ″) of the Ag/ TiO 2 -NW/Ge-NW/Si (MOS) device are obtained using the measured C, G/ω, thickness of the oxide layer, area of diode and permittivity of free space ( ǫ o ). The complex dielectric constant ( ε * = ε ′ − jε ′′ ), the real and imaginary parts could then be determined from the relations given in Eq. (7-8) 32 given below: A is the area of the device, d ox is the oxide layer thickness, ǫ o is the permittivity of free space ( ǫ o = 8.85 × 10 -14 F/cm), G m is the conductivity of MOS structure and ω is the angular frequency and j is the imaginary root of − 1. The dielectric loss tangent can be determined by the relation given in Eq. (9) 32 given below: Both the real and imaginary parts are calculated from the measured C and G/ω. The dielectric loss is expressed as the energy loss caused by the heating of a dielectric material in a variable electric field 26 . The loss factor is known as the energy spent at the dielectric to avoid bound charge displacement to be in phase with the field alternations 26 . From Fig. 6a-c, it is observed that the ǫ ′, ǫ ″ and tan(δ) values show independent behaviour from frequency in the inversion region and then starts to increase from the depletion region to the accumulation region. Furthermore, the ǫ ′, ǫ ″ and tan(δ) values decrease with increasing frequency. This behaviour can be explained by the fact that when the frequency is increased, the interfacial dipoles in the dielectric have less time to orient themselves in the direction of the alternating electric field and alternatively, the polarization decreases with the increase in frequency and remains constant 26 . This implies that at higher frequencies, the contribution of D it and dipole polarization could be neglected. In other words, the decrement in the ǫ ′ is due to the fact that the dipoles do not have enough time to orient themselves in the direction of electric field and the D it cannot follow the ac signal. Furthermore, the mix-phase established from the XRD plot, where both anatase and rutile type TiO 2 are reported might also be the reason behind the decrement in the ǫ′ 33 . The broad peak observed in the tan(δ) plot at frequencies less than 200 kHz could be attributed to the relaxation process and the D it . In addition, www.nature.com/scientificreports/ the behaviour of decrease in the values of the measured capacitance (C), dielectric constant ( ǫ ′) and dielectric loss ( ǫ ″) decreases with the increase in frequency is attributed to the presence of the interfacial polarization mechanism 28 . Moreover, to show the effect of voltage on the dielectric parameters, frequency dependent plots are shown in Fig. 7a-c at different bias voltage, respectively. It is observed that the decrease in values of ǫ ′, ǫ ″ and tan(δ) with the increase in frequency is due to the decrease in polarization with the increase in frequency and the values remains constant at high frequency. This implies that the contribution of dipole polarization and D it could be neglected at high frequency. Therefore, the D it cannot follow the ac signal and the absence of any interfacial polarization mechanism in the MOS device makes the contribution to C, ǫ ′ and ǫ ″ negligible at high frequencies (> 200 kHz). The low frequency dielectric behaviour of the MOS device can be attributed to four possible mechanisms: electrode interface, dc conductivity, dipole-orientation and charge carriers 34 .

Experimental procedure
TiO 2 -NW/Ge-NW is fabricated on a 1 cm × 1 cm n-type Si (100) substrate using the GLAD technique incorporated into an electron-beam evaporator (Vacuum Coating Unit Model-BC-300). Using an ultra-sonicator, the Si substrates are cleaned in a 3-step sequence using electronic grade acetone, methanol, and rinsed with de-ionized (DI) water. During the synthesis process, the base pressure of ~ 2 × 10 -6 mbar is maintained inside the electronbeam chamber. A deposition rate of 0.5 Å s −1 is maintained during the synthesis of TiO 2 -NW/Ge-NW using a digital thickness monitor (DTM). Firstly, a thin-film (TF) layer of Ge (30 nm) is deposited over the Si substrate using a pure 99.999% Ge source. Next the substrate is azimuthally rotated at. www.nature.com/scientificreports/ 30 rpm with substrate holder kept inclined at 85° with respect to the source where Ge-NW (200 nm) was synthesized. Subsequently the TiO 2 -NW (200 nm) is fabricated using pure 99.999% TiO 2 source over the Ge-NW to obtain coaxial TiO 2 -NW/Ge-NW assembly. Finally, silver (Ag) metal contacts are fabricated using an aluminum mask with a hole area ~ 7 mm 2 on both the samples. The schematic of the Ag/TiO 2 -NW/Ge-NW/Si MOS device is given in Fig. 8a-d. The electrical characterization of the devices is performed using a Keithly 4200 SCS from 10 kHz to 5 MHz.

Conclusion
The electrical and dielectric parameters of a GLAD synthesized Ag/TiO 2 -NW/Ge-NW/Si (MOS) device have been studied over a wide frequency and voltage ranges. It has been determined from the measured C and G/ω behaviour of the MOS device that the parameters were dependent on the applied frequencies and voltages. In addition, the wide dispersion exhibited in both C and G/ω curves in the depletion region was mainly attributed to the existence of the D it . Furthermore, the measured C and G/ω behaviour with the applied frequency and voltage were dependent on the D it , R s and the polarization process. The D it and R s parameters were computed using the Hill-Coleman and Nicollian-Brews methods in wide frequency and voltage ranges. The dielectric properties analysis of the MOS device established that the ǫ ′, ǫ ″ and tan(δ) parameters were dependent on frequency and that the values decrease with the increase in frequency. Furthermore, it is observed at higher frequencies (> 200 kHz), the ǫ ′ and ǫ ″ values remains constant which is attributed to the interfacial polarization. Moreover, the decrement in the ǫ ′ value for the MOS device is also due to the mix-phase of anatase and rutile type TiO 2 present in the structure as determined from the XRD study reported earlier. Therefore, the study of the proposed MOS device has highlighted that it offers improved device capability for opto-electronics applications and also the potential for further improvement to obtain better device performance.