Designs for a two-dimensional Si quantum dot array with spin qubit addressability

Electron spins in Si are an attractive platform for quantum computation, backed with their scalability and fast, high-fidelity quantum logic gates. Despite the importance of two-dimensional integration with efficient connectivity between qubits for medium- to large-scale quantum computation, however, a practical device design that guarantees qubit addressability is yet to be seen. Here, we propose a practical 3 × 3 quantum dot device design and a larger-scale design as a longer-term target. The design goal is to realize qubit connectivity to the four nearest neighbors while ensuring addressability. We show that a 3 × 3 quantum dot array can execute four-qubit Grover’s algorithm more efficiently than the one-dimensional counterpart. To scale up the two-dimensional array beyond 3 × 3, we propose a novel structure with ferromagnetic gate electrodes. Our results showcase the possibility of medium-sized quantum processors in Si with fast quantum logic gates and long coherence times.

www.nature.com/scientificreports/ and the barrier gate centers, respectively. In the first approach, a chemical mechanical polishing process may be used to obtain SiO 2 layer planarization 33,34 , easing the deposition of four overlapping gate layers-two for barrier gates (the first-and third-layer gates) and the other two for plunger gates (the second-and fourth-layer gates). Table 1 summarizes the layer indexes, gate names, and colors in Fig. 1b-d and the respective gate sizes. In this approach, we can reduce the number of overlapping gate layers. On the other hand, we do not have to perform etching and SiO 2 deposition in the second approach. In the following, we consider the array architecture realized in the first approach. We confirm the formation of electrostatic potentials for each QD in a Si quantum well (QW) in the room temperature simulation (Fig. 1e) carried out using COMSOL Multiphysics. It is seen from the figure that nine QDs are formed under every plunger gate, each of them is separated from the neighboring QDs and reservoirs by barrier gates.
Qubit operation in a two-dimensional QD array. In order to utilize this QD array as a quantum processor, it needs to be capable of spin readout, initialization, and manipulation. While this device does not have dedicated change sensor QDs, spin readout can be performed by the gate-based sensing techniques to detect the Pauli spin blockade (PSB) between neighboring QDs 15,20 . The spin state can be initialized, for instance, by relaxation to the doubly occupied ground singlet state and rapid adiabatic passage 27 . For spin manipulation, we  www.nature.com/scientificreports/ employ the electric-dipole spin resonance (EDSR) control based on micromagnets (MMs). The advantage of this scheme is that we can control the resonance frequency difference f r between neighboring QDs with the MM design [35][36][37] . While spin manipulation can also be implemented with ESR striplines 7,8,14,25,[27][28][29][30] , the control of f r in this case relies on the difference of g-factors between QDs and it may be difficult to obtain controlled f r across a large QD array with device viabilities 7,8,14 . In contrast, MMs can potentially control f r and f r in a consistent manner across the qubit array by properly designing them, as we will show through simulations in the following. Figure 2a shows the MM design for inducing the spatially inhomogeneous magnetic field ( B MM ) in which the external magnetic field ( B ext ) is applied in the direction of the arrow. The MM field B MM contains two essential components 12 : a transverse field ( b trans ) perpendicular to B ext and a longitudinal field ( B long ) parallel to B ext . b trans enables spin rotations combined with a QD displacement ( x ) by inducing an effective oscillating magnetic field. On the other hand, B long provides the qubit addressability by shifting the Zeeman energy at each QD. Moreover, this QD-dependent energy shift is essential for implementing two-qubit gates such as the controlled-not gate 8,9 , controlled-phase gate 8,10 and resonant SWAP gate 17,22 . For high fidelity single-qubit gates, f Rabi faster than 1 MHz is desirable 9,12 . Table 2 and Fig. 2b show the simulated transverse field slope ( b trans ) at the QD positions. b trans at each QD position is calculated to be 0.56-1.2 mT/nm, comparable to the values in the previously demonstrated linear QD arrays 12 . We estimate f Rabi to be 6.8-14 MHz assuming a conversion factor from b trans to f Rabi of 12 MHz nm/ mT, which is taken from previous experiment 9 . We assume that the MW drive is applied to the barrier gate next to the QD (along B ext ) to maximize f Rabi . In order to assess the qubit addressability, we calculate B long ( Fig. 2c and Table 3). The minimum B long difference ( B long ) over the set of nine QDs is 6 mT (between Q 23 and Q 33 ) and it corresponds to f r of 160 MHz. This is much larger than our calculated f Rabi and therefore large enough to prevent the crosstalk of single-qubit gates. These results show this MM design can induce field gradients necessary for the qubit addressability even in a 3 × 3 QD array. www.nature.com/scientificreports/ Efficient quantum circuit execution in a two-dimensional QD array. One of the potential advantages of two-dimensional qubit arrays is the reduced circuit depth of quantum algorithm implementations thanks to better qubit connectivity 38 . Here, we discuss the efficiency of the four-qubit Grover's search algorithm 31 implemented in our two-dimensional QD array, see Fig. 3a. This algorithm allows one to search for q 3 q 2 q 1 q 0 = | 1101� using the superposition of four qubits with the same probability (we define |0 � by the spin  Table 3. B long and f r at each QD position; f r is calculated with respect to the center QD.  www.nature.com/scientificreports/ down state). The four-qubit Toffoli gates play a central role in implementing this circuit and can be synthesized from 15 two-qubit gates including 2 SWAP gates for compensating the lack of direct qubit couplings (Fig. 3b) 39,40 (see Methods for the details). The spin state of qubit q X is read out by PSB with a measurement ancilla qubit M qX . For comparison, we consider a linear array of four QDs which are lined up together with adjacent QDs for spin readout as shown in Fig. 3c. In this qubit layout, 18 two-qubit gates including 5 SWAP gates are necessary to implement a four-qubit Toffoli gate. This shows that the two-dimensional QD array enables efficient quantum circuit execution due to improved qubit connectivity.
A larger scale two-dimensional array. The scalability of the EDSR control based on MMs has often been questioned because of its difficulty in inducing strong field gradients over large areas 30 . We have nevertheless shown that it is possible to induce field gradients in a small two-dimensional QD array. In the following, we propose a longer-term design approach that allows us to apply B long while ensuring sufficient b trans for each QD in a large two-dimensional array. The simple idea behind this approach is to decouple the magnet inducing b trans from the one inducing B long . Under the device design shown in Fig. 4a, b trans is induced by the plunger and barrier gate electrodes made of Co instead of Al, whereas B long is induced by a large Co magnet located outside of the QD array. This structure may be amenable to a larger qubit array with fast, MM-mediated electrical spin control at the expense of introducing vias to enhance QD density and connectivity as compared to the 3 × 3 QD array.
Under this novel magnet structure, it would be possible to integrate about 40 × 40 = 1600 QDs within a 5 × 5-µm 2 area because each QD occupies only 120 × 120-nm 2 . Assuming that PSB is used for spin state initialization as discussed above, we can consider an example of implementing qubits and ancillas in this QD array as shown in Fig. 4b. In this example, the 3 × 3 QD array consisting of 4 data qubits (red) and 4 ancillas functions as a unit cell. QDs with a cross are not used, so they can be empty, in which case coherent inter-site qubit transport 25 may be used to maintain high qubit connectivity. Alternatively, in the case of single occupancy, two-qubit exchange gates 17 would be needed for connection. As can be seen from this example, such a device would be able to host more than a thousand of qubits, a number of qubits much larger than those in any other www.nature.com/scientificreports/ existing quantum processors [41][42][43][44][45] , in a way compatible with high qubit connectivity and the spin operation scheme discussed above. Figures 4c, d show simulated values of B long slope in the x and y directions induced by a large Co magnet located outside the QD array (yellow square). In the QD array, the f r values between the nearest-neighbor QDs are larger than 100 MHz (corresponding to > 0.03 mT/nm), which are sufficient for unconditional single-qubit operations and two-qubit gate manipulations. Figure 4e shows simulated values of b trans induced by the Co gates. Although the formation of QDs in such a gate structure may not have been demonstrated, the electrostatic potential of each QD can be controlled independently by the plunger gate and the interaction between neighboring QDs can be adjusted by the barrier gate, ensuring precise manipulation of qubits. This electrical controllability, in conjunction with local magnetic fields, may also be used to compensate for qubit frequency shifts that can potentially be induced by the strain electric and the stray magnetic fields. Here, we use a 5 × 5 QD array for simulation simplicity and assume the gate sizes of Co plunger and barrier gates are 60 nm × 60 nm and 60 nm × 40 nm, respectively. The estimated average value of f Rabi for the 25 QDs is 39 MHz (assuming the same conversion factor used in the previous discussion), which is about three times faster than that in the 3 × 3 array discussed above owing to the close proximity of the magnet and QDs. The value of b trans induced by the Co gates is more than ten times larger than the transverse component of the field induced by the large Co magnet, so that we can safely approximate it to be due to the Co gates. By applying the proposed magnet fabrication approach, quantum processors with large numbers of qubits may be achieved with high-speed qubit manipulation, leveraging mature fabrication and integration techniques in Si. We anticipate that even larger arrays will be possible by further improving the magnet design.

Discussion
In this study, we discuss the feasible device designs of a two-dimensional Si QD array for multi-qubit quantum processing with qubit addressability. We reveal the possibility to provide qubit addressability in the two-dimensional array of 3 × 3 QDs, which can execute quantum circuits more efficiently compared with the one-dimensional array. We note that this method is essentially based on experimentally realized MM and QD structures with device viabilities. We have furthermore presented a possibility of hosting hundreds of qubits with f Rabi increased by roughly three times by employing a novel magnet-incorporated QD structure. We believe both methods will allow to scale up QD array sizes, to a level that was previously thought to be difficult with this scheme, while maintaining consistency with established fabrication techniques and qubit controllability in the presence of observed device variabilities. Our results have shown how to guarantee qubit addressability when electron spin qubits in Si are integrated to a larger scale. Quantum processors with large numbers of qubits, high-fidelity quantum logic gates, and long coherence times might accelerate research on quantum algorithms and architectures, enhancing the potential of quantum computing.

Methods
The method for mapping quantum circuits to QD arrays. We employed Qiskit's LookaheasSwap routing method 40 for mapping quantum circuits via insertion of SWAP gates to construct quantum circuits for four-qubit Grover's search algorithm. This method repeats the process of selecting the SWAP gate that maximizes the number of subsequent executable two-qubit gates when there is a two-qubit gate that cannot be executed in the current physical qubit layout. While Qiskit provides other methods to map circuits by inserting SWAP gates, we chose this method because it produces the circuit with smaller numbers of SWAP gates for both two-dimensional and one-dimensional QD arrays.