Thin-film synthesis of superconductor-on-insulator A15 vanadium silicide

We present a new method for thin-film synthesis of the superconducting A15 phase of vanadium silicide with critical temperature higher than 13 K. Interdiffusion between a metallic vanadium film and the underlying silicon device layer in a silicon-on-insulator substrate, at temperatures between 650 and 750 °C, favors formation of the vanadium-rich A15 phase by limiting the supply of available silicon for the reaction. Energy dispersive X-ray spectroscopy, X-ray photoelectron spectroscopy, and X-ray diffraction verify the stoichiometry and structure of the synthesized thin films. We measure superconducting critical currents of more than 106 amperes per square centimeter at low temperature in micron-scale bars fabricated from the material, and an upper critical magnetic field of 20 T, from which we deduce a superconducting coherence length of 4 nm, consistent with previously reported bulk values. The relatively high critical temperature of A15 vanadium silicide is an appealing property for use in silicon-compatible quantum devices and circuits.

www.nature.com/scientificreports/ leaving a sharp and smooth V 3 Si/SiO 2 interface. In our experiments, we start with SOI wafers having a 20-nm Si (100)-oriented device layer on top of a 140 nm thick thermal SiO 2 . Stoichiometric conversion of the entire 20 nm thick Si layer to V 3 Si by silicidation requires the number of V atoms supplied by a 42 nm thick film (see "Methods" section). Most typically, we deposit 90 nm of V-which provides an oversupply of V to ensure complete silicidation of the Si device layer. Prior to annealing, we observe a sharp V/Si interface from cross-sectional scanning electron microscope (SEM) images (Fig. 2a). The samples are annealed in high vacuum (10 −7 Torr) for 15 min, at temperatures (T) ranging from 650 °C to 900 °C. The V/Si interface disappears after annealing at sufficiently high temperature (Fig. 2b), due to V-Si interdiffusion. Silicidation at T = 800 °C or lower maintains a sharp, smooth interface at the underlying SiO 2 layer, while higher T roughens this interface, indicating a reaction with the SiO 2 (Fig. 2c). Scanning transmission electron microscopy (STEM) reveals more details of the silicidation process. Highangle annular dark field (HAADF) cross-sectional images of a sample annealed at 700 °C ( Fig. 2d-f) show two distinct regions within the V-Si layer: an upper, porous region and an underlying, denser layer (Fig. 2d).   www.nature.com/scientificreports/ Energy dispersive X-ray spectroscopy (EDX) shows that the top layer is pure V and the bottom layer contains both V and Si ( Fig. 2e-g), consistent with our supplying excess V for the silicidation reaction. The porosity of the V layer is a result of deposition by thermal evaporation, as deposited V atoms quickly lose kinetic energy on the cold substrate and have insufficient mobility to form close-packed films. Quantitative analysis of the EDX maps shows that the bottom layer contains V and Si in a 3:1 ratio (Fig. 2h). X-ray diffraction (XRD) confirms formation of the A15 phase of V 3 Si for samples annealed at 700 °C, along with impurities of VSi 2 and V 5 Si 3 (Fig. 3). Annealing at 600 °C shifts the broad V (110) peak at 42° to 40°, which is matched to V 5 Si 3 (102) but is very broad and likely reflects an intermediate amorphous phase formed during interdiffusion. The presence of VO (200) peak in all samples suggests partial oxidation of the deposited V due to air exposure. For any sample annealed at less than 800 °C, we do not expect reaction between vanadium and SiO 2 , which is evident from the sharp interface between the V/Si layer and the SiO 2 layer (Fig. 2b). According to the EDX maps, the V 3 Si layer is about 50 nm in thickness, which matches closely the thickness expected from stoichiometric conversion of Si (52 nm, see "Methods" section). The dense V 3 Si layer suggests that V is the predominant diffusion species, i.e., that silicidation occurs primarily by V diffusing into the Si lattice. Significant Si diffusion would result in the silicide inheriting the porous appearance of the deposited V layer. Our observation is consistent with those of previous studies, which noted an 'ordered Cu 3 Au rule' 20 , suggesting that majority atoms are the most mobile ones in the class of A 3 B compounds 21 .
Profiling the vanadium silicide film by sequential argon ion milling and X-ray photoelectron spectroscopy (XPS) verifies its composition (Fig. 4). The film top surface is composed of excess V that has been oxidized upon air exposure, with the V 2p 3/2 peak positioned at 515.6 eV, corresponding to a V 3+ oxidative state (Fig. 3a, black color). Beginning with spectra taken from 12 nm below the top surface, this peak shifts to 513 eV, which corresponds to elemental V (Fig. 4a, red color). The emergence of the Si 2p peak at 99.0 eV (Fig. 4b, green color) at a depth of 70 nm and beyond indicates the conversion to V 3 Si. In this region, the Si 2p peak position is very close to elemental Si (99.4 eV), while the V 2p 3/2 peak remains at 513 eV, consistent with the metallic nature of V in A15 V 3 Si 22 . By analyzing the peak areas and sensitivity factors associated with V 2p 3/2 and Si 2p elements in the V 3 Si region, at a depth of 77 nm (Fig. 4, blue color), the relative elemental ratio between V and Si is obtained at 3:1, consistent with EDX measurements (Fig. 2h). The O 1s peak at 531 eV across all depths indicates the presence of vanadium oxide (VO) in both metallic V and vanadium silicide region due to exposure to air. Transport measurements. Four-probe resistance measurements of V 3 Si films versus T reveal their metallic nature and the superconducting transition temperature (T c ). We measure the film in-plane resistance using a constant-current bias of 50 µA and vary T at a rate of ~ 1 K min −1 with no magnetic field. The sheet resistance of a 50 nm thick V 3 Si film silicided at 700 °C decreases from 2.8 to 1.0 Ω/sq upon cooling from room T to 20 K, a resistance ratio of 2.8 (Fig. 5a, inset). These values reflect the parallel normal state resistance of both the V 3 Si and the overlaying metallic V layer (also about 50 nm thick). At T c = 13.75 K, the film resistance abruptly decreases to zero with a transition width of 0.3 K, marking the onset of superconductivity. Films silicided at T between 650 and 750 °C all showed superconducting transitions, with T c decreasing with decreasing silicidation T (Fig. 5a). We do not observe a superconducting phase transition in films silicided at T ≤ 600 °C measured to temperatures as low as 4 K (Fig. 5a, inset). The critical current density is determined from voltage-current measurements of strips fabricated from V 3 Si thin film annealed at 700 °C. The strips are 30 µm in width and are patterned using photolithography, with etching performed in an argon ion mill (2.5 mA/cm 2 beam density), and electrical con- www.nature.com/scientificreports/ tacts deposited by e-beam evaporation of 10 nm titanium and 300 nm gold. The voltage-current behavior of strips patterned from a V 3 Si film change from linear behavior above T c to non-linear near the superconducting transition (Fig. 5b, inset). Films display sharp, fully developed, critical currents at T < T c, which increase as T is further reduced. At T = 5 K, the critical current density (j c ) is 8.7 × 10 5 A cm −2 , slightly higher than previous reports taken on V 3 Si single crystals 23 . This is likely due to the presence of impurity phases acting as flux-pinning centers, which lead to the observed higher critical current densities. Because the T c of metallic V is 5.4 K for single crystals 24 , and lower for amorphous films deposited from the vapor phase 25 , the only contributions from the 50-nm-thick amorphous V film to j c that we would expect within the range of measured temperatures (5-15 K) is a proximity effect induced superconducting layer near the V 3 Si that serves to increase the effective thickness that carries supercurrent, which is taken into account in the main panel of Fig. 5b.  www.nature.com/scientificreports/ The A15 phase of vanadium silicide is a known type II superconductor that undergoes phase transitions at two different applied magnetic fields. At a lower critical magnetic field (H c1 ) the superconducting order parameter is locally suppressed and the material supports magnetic vortices, and at an upper critical field (H c2 ) the material reverts to the normal state. We measured the V 3 Si film resistance versus T in a series of increasing applied magnetic fields (H) in order to determine H c2 (0), the upper critical field at 0 K. The T c of a V 3 Si film silicided at 700 °C and having T c (0) ~ 13 K is continuously suppressed with increasing magnetic field (Fig. 6). For each H, we determine the corresponding T c (H) using the criteria R/R N = 0.5 (midpoint T c ), where R N is the normal state resistance. In the color map shown in Fig. 5, the dependence of H c2 on T appears as a narrow white region separating normal and superconducting behaviors. Because the highest magnetic fields available in our experiment (9 T) are insufficient to completely suppress superconductivity in our films, we deduce H c2 (0) for the material indirectly using the Werthamer-Helfand-Hohenberg model, which gives: where γ ≈ 0.5772 is Euler's constant 26 . A linear fit to the H c2 -T relation in the range of 0 T < μ 0 H c2 ≤ 1 T provides both the tangent term in Eq. (1) and zero field T c (0), respectively, as the slope and the T-axis intercept (Fig. 5). From this analysis, we obtain μ 0 H c2 (0) = 20 T, which is consistent with the previously-reported bulk value of H c2 = 23.5 T for V 3 Si 27 . Knowing H c2 (0) , we can also calculate the superconducting coherence length ξ (0) in our V 3 Si to be 4 nm, using the relation µ 0 H c2 (0) = � 0 /2πξ 2 (0) 28 , where � 0 = h/2e is the magnetic flux quantum, also consistent with previous reports 29 .

Summary and outlook
In summary, we have described a new method for synthesis of the A15 phase of vanadium silicide by silicidation of metallic vanadium layers deposited on silicon-on-insulator substrates. The limited supply of silicon available for silicidation facilitates formation of the superconducting, vanadium-rich A15 phase. V 3 Si thin films synthesized on silicon-on-insulator substrates are type-II superconductors with T c > 13 K. The relatively high T c is an appealing property for use in silicon-compatible quantum devices and circuits.

Methods
Fabrication of V 3 Si thin films. The substrates, which are silicon-on-insulator (SOI) wafers with a 20 nm Si device layer and a 140 nm oxide SOI wafer, are dipped in a 10:1 buffered oxide etch (BOE) for 1 min to remove the native silicon oxide. Immediately after the oxide stripping, vanadium layers of different thicknesses are deposited by thermal evaporation in high vacuum (~ 10 −7 Torr). After metal deposition, the substrate is annealed in high vacuum for 15 min, at temperatures ranging from 650 °C to 900 °C, to form V 3 Si by V-Si interdiffusion. Scanning transmission electron microscopy (STEM) imaging. The specimen for STEM studies is a 40 nm-thick vertical cross-sectional slice of the silicide film mounted on a copper grid using the in situ focused ion beam milling and lift-out technique (Helios 600 dual beam FIB). High-angle annular dark field (HAADF) and energy dispersive X-ray spectroscopy (EDX) mapping images are collected over the same area simultaneously, using an FEI Talos F200X microscope.
Transport measurements on V 3 Si thin films. Electrical transport measurements are performed in either a closed-cycle cryocooler or a top loading He-3 cryostat equipped with a 9 T magnet. Resistance is determined by delta mode averaging with a DC bias current provided by a source meter and sample voltage measured with a nanovoltmeter. Measurements of the T-dependence of the upper critical field are made by constant field temperature sweeps and verified by constant temperature magnetic field sweeps. The critical current density is determined from voltage-current measurements of strips fabricated from V 3 Si thin film annealed at 700 °C. The strips are 30 µm in width and are patterned by standard photolithography, with etching performed in an argon ion mill (2.5 mA/cm 2 beam density), and electrical contacts deposited by e-beam evaporation of 10 nm Ti and 300 nm Au, followed by liftoff.