S-band hybrid amplifiers based on hydrogenated diamond FETs

The first realizations of S-band hybrid amplifiers based on hydrogenated-diamond (H-diamond) FETs are reported. As test vehicles of the adopted H-diamond technology at microwave frequencies, two designs are proposed: one, oriented to low-noise amplification, the other, oriented to high-power operation. The two amplifying stages are so devised as to be cascaded into a two-stage amplifier. The activities performed, from the technological steps to characterization, modelling, design and realization are illustrated. Measured performance demonstrates, for the low-noise stage, a noise figure between 7 and 8 dB in the 2–2.5 GHz bandwidth, associated with a transducer gain between 5 and 8 dB. The OIP3 at 2 GHz is 21 dBm. As to the power-oriented stage, its transducer gain is 5–6 dB in the 2–2.5 GHz bandwidth. The 1-dB output compression point at 2 GHz is 20 dBm whereas the OIP3 is 33 dBm. Cascading the measured S-parameters of the two stages yields a transducer gain of 15 ± 1.2 dB in the 2–3 GHz bandwidth.


Methods
Technology. High-quality, single-crystal, 1 µm-thick diamond films were grown by Plasma-Enhanced MicroWave Chemical Vapor Deposition (PE-MWCVD) technique on commercial, low-cost, synthetic diamond substrates 4.5 × 4.5 × 0.5 mm 3 in size and (100)-oriented. The diamond films were treated with hydrogen plasma to terminate the surface with hydrogen bonds, which makes it conductive. More in detail, the following procedure was followed: first, interrupt CH 4 flux, expose the sample to hydrogen plasma for 30′ with an increased H 2 flux of 120 sccm and pressure of 150 mbar. The MISFETs were fabricated on a hydrogenated CVD diamond layer. They have a coplanar layout with two gate fingers of 1 µm length, 75 and 150 µm widths. The device fabrication process consists in the following steps. A gold film, 200 nm in thickness, was thermally evaporated on hydrogenated diamond surface to form the ohmic contact on it. The Au mask, patterned by standard photo-lithographic techniques, was used as the electrode for the source and drain contacts. In order to electrically insulate the devices on the same diamond substrate, the surface was oxidized by Reactive Ion Etching (RIE) in O 2 gas. A second photolithography was performed to define the bilayer Ti/Au (50 nm/200 nm) bond-pad structures used to wire bonding the devices. Then, a third photolithography and Au wet etching by KI/I 2 were performed to define a source-to-drain gap of about 3.5 μm. Subsequently, a thickness of about 10 nm of V 2 O 5 was thermally evaporated on the whole active diamond surface after an annealing treatment at 250 °C in vacuum 14 . Finally, a 1 µm-long gate was fabricated by thermal evaporation of aluminum (100 nm in thickness) and lift-off technique. Channel geometry was chosen on the basis of previous studies 19 . The oxide and metal layer thicknesses were measured by a calibrated quartz microbalance during the evaporation technique. A schematic cross-sectional view of diamond MISFETs and an optical photo of the device active region are shown in Fig. 1(a) and (b), respectively. Finally, the diamond substrate was glued on a dedicated PCB (as detailed in the section about design) and aluminum wire (25-μm in diameter and about 2.5-mm long) was used to ultrasonic micro-bond diamond devices to external circuits, as clearly seen in Fig. 1(c).
Characterization and modelling. The characterization campaign included DC, small-signal, noise figure, load pull and compression measurements. Drain and gate voltages were limited to negative values down to − 20 V and − 4 V, respectively, to safeguard the devices from degradation, which occurs as a gradual, irreversible shrink of the output I-V curves. Also, DC power and current densities were limited as follows: P D /W ≤ 3 W/mm and I D /W ≥ − 350 mA/mm. These limitations are the result of the experience gained with this technology in the past 13 and in recent work carried out by some of the authors 20 . For an explanation on the degradation mechanisms in H-diamond devices, the Reader is referred to 17 .
S-parameters were measured up to 40 GHz by means of a custom Thru-Reflect-Line calibration kit realized on a diamond substrate identical to those carrying the active devices. The kit comprises four "line" standards (THRU, LINE1 to LINE3), ranging from 460 to 3260 µm, and two "reflect" standards (OPEN and SHORT). The track and gap width of the CPW lines are 8 µm and 36 µm, respectively. Clearly, the access geometry is the same as for the active devices to be measured. As a reference, the attenuation constant of the lines range from 0.5 to 0.75 dB/mm for frequencies between 1.5 and 6 GHz. Matched-load noise figure (NF 50 ) was measured in the 5-15 GHz band with the Y-factor technique, by exploiting a solid-state noise source with nominal excess-noise ratio (ENR) of 5 dB. Typical NF 50 values in the measurement band range from 11 to 15 dB, depending on frequency and operating point: so high values are a consequence of the remarkable distance of the optimum noise reflectance (Γ opt ) from the origin of the Smith chart. Incidentally, similar considerations hold true for the reflectances for simultaneous conjugate match and optimum output power.
Based on small-signal measurements of the whole 2× family realized (unit gate peripheries of 25 µm, 50 µm, 75 µm, 100 µm and 150 µm), a scalable equivalent-circuit model was also extracted by means of the approach in 21 , whose schematic is reported in Fig. 2. Normalized transconductance g m /W was found to be approximately 120 mS/mm, whereas the channel time delay τ was about 7 ps. The extrinsic resistors were found to be nonnegligible: R G ≈ 7 Ω, R S •W ≈ R D •W ≈ 9 Ω•mm. The scalable model was also equipped with equivalent noise temperatures, extracted from NF 50 measurements as explained in 21 . As from previous experience with the technology, the optimum terminations for available gain and noise figure are far from the standard 50 Ω load: this entails practical difficulties when matching for gain, noise or the (best) trade-off of the two 22 , because the external reference impedances are clearly out the designer's control.
Large-signal characterization was carried out on devices with periphery 2 × 150 µm at 2.5 GHz. In particular, load-pull measurements were performed to locate the optimum load impedance for output power, which resulted to be Z L = (260 + j90) Ω at 2 GHz. The maximum output power resulted to be 17 dBm at 5-dB compression, associated with a 23% efficiency.
Amplifier design approach. Based on the figures of merit obtained for the realized transistors, the goal was set of designing a two-stage S-band hybrid amplifier, featured by at least 10 dB of gain. However, as a measure to minimize risk and explore different kinds of design, the two stages were designed and realized as independent amplifiers, one oriented to low-noise operation (LNA), the other to high power (HPA).
The designs were carried out based on a low-loss, low-dielectric constant substrate: the latter feature was selected to reduce sensitivity to tolerances in PCB realization. In particular, a Diclad-870 substrate was used, featured by a height of 760 µm and a relative dielectric constant of 2.33 and a loss tangent of 0.0009. In addition to the amplifying stages, a custom Line-Reflect-Reflect-Match (LRRM) cal kit was designed: the amplifiers and cal kit are compatible with Ground-Signal-Ground RF probes with 750 µm pitch. The input and output matching networks (IMN and OMN, respectively) of the LNA and HPA also include RF-DC decoupling subnetworks and DC feeds, the latter accessible with single-finger probes.
The five cards corresponding to the four matching networks and to the cal kit were arranged into a single panel, subsequently cut in the necessary pieces. Then, the PCBs were completed by soldering surface-mount devices (SMDs) with standard (imperial) sizes of 0402, 0603 and 1206. The schematics of the four cards implementing the matching networks of the LNA and HPA stages are reported in Figs. 3 and 4, respectively. Labels denoted with asterisks indicate that the component is optional. The component details are listed in Table 1.
Based on a LRRM calibration, passive networks were ensured to behave according to simulations. Similarly, the active devices on the diamond sample were screened to discard those not working: this step is not critical since just one transistor is needed for the LNA stage and two for the HPA, and a whole 5 × 4 matrix of the desired periphery is available for either stage. However, the two HPA devices are required to lie on the same column to allow minimum-length bonding.
Then, after selecting the active devices, both the diamond samples and the matching network pairs were glued onto rigid supports, namely, FR-4 with 1.6 mm thickness. The diamond samples were placed inside ad   Fig. 5. In more detail, one 2 × 75 µm MISFET was employed in the low-noise stage and two 2 × 150 µm MISFETs were used in the high-power stage. Further details are given below in the dedicated sections. For the purposes of the current project, given the low power densities to be handled, no specific measures were taken to dissipate heat. Notice, however, that the heat produced by the transistors can spread out through the large diamond samples (4 mm × 4 mm), since the devices are not diced. Measured output power levels of the fabricated amplifiers agree well with those of the bare devices, showing that detrimental effects due to temperature increase did not take place.
S-parameter measurements were performed on the realized stages by means of the LRRM cal kit, in addition to other characterizations. Specific details relevant to the LNA and HPA designs and measurement campaign are given in the following subsections.  . Schematics of the two cards implementing the matching networks of the HPA stage. Input and output RF pads are denoted as P 1 (or P′ 1 ) and P 2 (or P′ 2 ), respectively. DC pads are denoted as V 1 (or V′ 1 ).

Results
Low-noise stage. The target performance of the low-noise stage was lowest possible noise figure, gain higher than 6 dB, input and output return losses better than 10 dB. The design band was tentatively 2-3 GHz, and at least half of it. As to the noise performance, a goal of 7.5 dB was set based on the 6-7 dB values of NF min at 3 GHz predicted by the model of the bare device. However, the comparative distance of the optimum noise match from the origin of the Smith chart represents a serious obstacle to reaching this noise level. The final design comprises a 3-element IMN and a 5-element OMN (excluding DC feeds and decoupling elements), connected to a 2 × 75 µm FET nominally operated at V DS = − 10 V, I D /W = − 175 mA/mm. EM simulation of the matching networks, in conjunction with a compact model of the bonding wires 23 and the equivalent-circuit model of the active device, foresees a noise figure from about 6 dB to about 8 dB across the whole S-band and a transducer gain from 9 to 7 dB. Also, the targets on return loss are achieved in simulations.
Unfortunately, however, scattering measurements revealed an output return loss much worse than expected (~ 4 dB), which impacted negatively on transducer gain in the upper half of the S-band, as shown in Fig. 6. At least, the IMN fulfilled the 10-dB target on return loss and, more importantly, yielded a measured noise figure comparable to simulations, comprised between 7 and 8 dB: see Fig. 7. This is because the OMN of the singlestage amplifier, being basically reactive, has little effect on output available powers (both signal and noise), and therefore on available gain and noise figure.
Finally, the linearity of the stage was evaluated by means of a 2-tone test, as shown in Fig. 8. The resulting output intercept point is about 21 dBm at 2 GHz.
High-power stage. The power-oriented stage was designed based on the load-pull and power compression measurements performed during the characterization phase of the ReMiDA project. In order to increase the out-  As to the matching networks and microwires, the same EM simulator and compact models were adopted, respectively, as for the LNA. This time, EM simulations were more largely exploited, due to the distributed nature of the matching networks, which basically consist of a microstrip splitter and combiner. Whereas the output combiner delivers the same drain voltage to both transistors, the input splitter accommodates two separate bias paths for possible tuning. The output combiner also acts as a pair of quarter-wave transformers, mapping the output 50-Ω impedance to the optimum power termination: this was achieved with relative ease, by exploiting the fact that the optimum load is approximately a high resistance, with negligible reactive part. The simulated and measured transducer gain of the HPA are compared in Fig. 9: these are in good agreement and amount to about 5 or 6 dB, whereas the measured input and output return losses are again worse than simulated (6 dB and 4 dB, respectively). The measured 1-dB compression point of the HPA is 20 dBm and the third-order intercept point is 33 dBm, both referred to the output section: see Fig. 10.  Fig. 11. The input and output return losses are better than 5 dB and 4 dB, respectively.

Discussion
For the first time, hybrid amplifiers based on H-diamond FET and operating in S-band are reported. The activities show that the technology still suffers from nonnegligible variability among different realizations, so that the effectiveness of the matching networks can be negatively impacted. Nevertheless, measured performance demonstrates the suitability of H-diamond FETs to microwave applications. The natural evolution of these activities includes the optimization of the technology (stabilization, down-scaling of the gate length) so as to achieve better performance at higher frequencies.

Data availability
The Authors make available to readers the collected data and the followed procedures.