Figure 6 | Scientific Reports

Figure 6

From: SLIM: Simultaneous Logic-in-Memory Computing Exploiting Bilayer Analog OxRAM Devices

Figure 6

Four possible input operand combinations: (a) a = b = ‘0’; (b) a = ‘0’, b = ‘1’; (c) a = ‘1’, b = ‘0’; (d) a = b = ‘1’; corresponding to NOR truth table and proposed signal mapping for each case for the 2T-1R SLIM bitcell. [VTB = VTE − VBE; VG = 10 V (7 ms long); V2 = P3 = 5.5 V (7 ms long). Experimental results for NOR logic implemented using 2T-1R SLIM bitcell with device’s initial state: ‘11’ (eh), and ‘01’ (il). Among the four operand combinations, OxRAM device switches to Logic HRS state (‘10’ or ‘00’) for a = ‘0’, b = ‘1’; a = ‘1’, b = ‘0’ and a = b = ‘1’. Blue: transient current through OxRAM device. Black line: P3 in all cases (applied signal).

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