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Figure 1

From: Room-temperature Operation of Low-voltage, Non-volatile, Compound-semiconductor Memory Cells

Figure 1

Device structure. (a) Schematic of the processed device with control gate (CG), source (S) and drain (D) contacts (gold). The red spheres represent stored charge in the floating gate (FG). (b) Details of the layer structure within the device. In both (a,b) InAs is coloured blue, AlSb grey and GaSb dark red. (c) Cross-sectional scanning transmission electron microscopy image showing the high quality of the epitaxial material, the individual layers and their heterointerfaces.

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