A New Family of Multilevel Grid Connected Inverters Based on Packed U Cell Topology

In this paper a novel packed U cell (PUC) based multilevel grid connected inverter is proposed. Unlike the U cell arrangement which consists of two power switches and one capacitor, in the proposed converter topology a lower DC power supply from renewable energy resources such as photovoltaic arrays (PV) is used as a base power source. The proposed topology offers higher efficiency and lower cost using a small number of power switches and a lower DC power source which is supplied from renewable energy resources. Other capacitor voltages are extracted from the base lower DC power source using isolated DC-DC power converters. The operation principle of proposed transformerless multilevel grid connected inverter is analyzed theoretically. Operation of the proposed multilevel grid connected inverter is verified through simulation studies. An experimental prototype using STM32F407 discovery controller board is performed to verify the simulation results.


A New Family of Multilevel Grid Connected Inverters Based on Packed U Cell Topology Majid Pakdel & Saeid Jalilzadeh
In this paper a novel packed U cell (PUC) based multilevel grid connected inverter is proposed. Unlike the U cell arrangement which consists of two power switches and one capacitor, in the proposed converter topology a lower DC power supply from renewable energy resources such as photovoltaic arrays (PV) is used as a base power source. The proposed topology offers higher efficiency and lower cost using a small number of power switches and a lower DC power source which is supplied from renewable energy resources. Other capacitor voltages are extracted from the base lower DC power source using isolated DC-DC power converters. The operation principle of proposed transformerless multilevel grid connected inverter is analyzed theoretically. Operation of the proposed multilevel grid connected inverter is verified through simulation studies. An experimental prototype using STM32F407 discovery controller board is performed to verify the simulation results.
Multilevel inverters are the most suitable solution for grid connection of renewable energy resources such as photovoltaic arrays (PV) or wind turbines. Multilevel inverters can produce high voltage with lower harmonics and lower stress on power switches 1 . The most common multilevel inverter topologies are cascaded H-bridge (CHB), neutral point clamped (NPC), and flying capacitors (FC) [2][3][4] . Packed U cells (PUC) are recent developed multilevel inverters with reduced number of capacitors and power devices [5][6][7][8][9][10] . The PUC topology needs only one high voltage DC power supply and the lower voltage levels are automatically generated with switching operation in packed U cell capacitors. However, the CHB inverter requires many DC power sources 11 . With equal number of voltage levels, the PUC inverter requires half of power supplies and one third of capacitors compared with FC topology 12 . Furthermore, in the PUC inverter the zero voltage level in freewheeling period can be achieved without using extra power switches. Therefore, the common mode voltage (CMV) will be zero in freewheeling period; as a result the ground leakage current will be declined significantly.
In this paper a novel PUC based multilevel inverter is proposed. Unlike the PUC topology, a lower DC power supply from renewable energy resources such as photovoltaic arrays (PV) is used as a base power source. In fact, other power sources are extracted from the base lower DC power supply using isolated DC-DC power converters. In this case, the output peak voltage will be the summation of lower DC power supply and individual DC power sources extracted from the base power source via isolated DC-DC power converters. Moreover, the DC source voltages are the integer multiples of the lowest DC power supply. Therefore, in contrast with the PUC topology with a higher DC voltage source, in the proposed multilevel inverter, multiple low voltage DC power supplies are used.
Moreover, only a lower DC source and multiple isolated push-pull or forward DC-DC converters can be used instead of a higher DC voltage supply in the PUC topology. In this paper a novel packed U cell (PUC) based multilevel grid connected inverter is elaborated on. The U cell arrangement consists of two power switches and one capacitor. However, in the proposed converter topology, a lower DC power supply from renewable energy resources such as photovoltaic arrays (PV) is used and the other voltages across capacitors are obtained from isolated DC-DC power converters. The proposed topology offers higher efficiency and lower cost applying a small number of power switches and only one lower DC power source. Other capacitor voltages are obtained from the base lower DC power source using isolated DC-DC power converters. After analyzing the operation principle of proposed transformerless multilevel grid connected inverter theoretically, operation of the proposed multilevel grid connected inverter is verified through simulation studies. To validate the simulation results, an experimental prototype using STM32F407 discovery controller board is performed.

Proposed Multilevel Inverter
The proposed single phase three-cell PUC based transformerless grid connected 7-level inverter topology is depicted in Fig. 1. The proposed inverter topology consists of three cells separated by one DC power source and a capacitor. Voltage V 1 is the DC power supply generated from renewable resources such as photovoltaic (PV) panels and the voltage V 2 is a voltage produced by an isolated push pull or a forward DC-DC converter which is connected to the low voltage V 1 of PV panels. In the proposed 7-level inverter topology, the following equation is satisfied.  (1) 2 1 The switching function of switch S i is defined as follows.        Depending on the control states s i , the output voltage level is determined. Eight possible switching states are identified as illustrated in Table 1. As it can be viewed from Table 1, the states 4 and 5 are representing the zero voltage vectors; however, the other six states are active vectors generating appropriate voltage levels at the output of grid connected multilevel inverter.
Using Kirchhoff laws the following equation between the voltages V 1 and V 2 , grid current i g , and the switching states s i could be written. For the proposed 3-cell PUC based grid connected 7-level inverter, the grid current must be controlled for ensuring proper operation of the 3-cell PUC based multilevel inverter. Generally, the proposed 3-cell PUC based 7-level inverter can be extended to more levels and lower DC power sources by adding more cells to the PUC  Table 3. Simulation parameters.  based multilevel inverter. Figure 2 illustrates an n-DC power supply and (n + 1) cells based on the proposed multilevel inverter. In this case, the total voltage levels (TVL) are calculated as follows.
= + + TVL n n ( 1) 1 (4) where, n is the total number of DC power sources in the proposed PUC based multilevel inverter. Moreover, the voltage relation between n-DC power sources is expressed with the following equation.   Therefore, the peak output voltage level is written as the following equation.

Operation of the Proposed 3-Cell PUC Based 7-Level Grid Connected Inverter
One-cycle operating states of the proposed 3-cell PUC based 7-level grid connected inverter are illustrated in Fig. 3. The first DC power source V 1 which is generated from PV panels, and the second DC power supply V 2 whose voltage is twice as much as voltage V 1 and is built with DC source V 1 using isolated push pull or forward DC-DC converters, are required to produce the designed voltage levels across the grid voltage. Six power devices S 1,2,3,4,5,6 have been used in the proposed multilevel inverter. Each power switch consists of an IGBT with its anti-parallel diode and has two operating states i.e. ON state and OFF state. As shown in Table 1 Table 1. The operation sequence of the proposed grid connected multilevel inverter is defining eight possible states as portrayed in Fig. 3. As shown in Fig. 3, the grid voltage is fed by seven voltage levels i.e. V 1 + V 2 , V 2 , V 1 , 0, −V1, −V 2 and −V 1 − V 2 in the single phase topology.

Control Strategy of the Proposed 3-Cell PUC Based 7-Level Grid Connected Inverter
The control strategy for generating the reference voltage for the proposed PUC based multilevel inverter is depicted in Fig. 4. Assuming the reference voltage to be a sinusoidal waveform, it can be subdivided into three positive and three negative zones as illustrated in Fig. 5. Using seven-level sinusoidal modulation, four pulses can be produced in whose positive zones, the comparator output (one or zero) is added to 1 and in negative zones the comparator output (one or zero) is added to −2. However, in Zone D (or state 5) the comparator output (one or zero) is added to −1 as shown in Fig. 6. Summing these signals will produce signal S which has eight voltage levels as illustrated in Fig. 7.
The voltage levels correspond to the seven-level output voltages with the redundant zero output voltages (states 4 and 5). Therefore, using a lookup table (Table 2), the seven voltage levels would be synthesized as shown in Fig. 6.

Simulation Results
The proposed 3-cell PUC based grid connected 7-level inverter parameters are given in Table 3. The V 1 dc bus is assumed to be 110 V and the V 2 dc bus is generated from an isolated push pull DC-DC converter or a forward converter. The voltage V 2 is set to be twice as big as the voltage V 1 value (220 V). The AC load is a series connection of a 100 Ω resistor and an inductor of 1 mH. The switching frequency of the sinusoidal PWM modulation is set at 5 kHz. The simulation was performed using PSIM software. The AC load voltage has seven levels and its harmonic contents are around multiples of the switching frequency (5 kHz) as shown in Fig. 8. The calculated total harmonic distortion (THD) of the output voltage is 14.76%. Furthermore, as illustrated in Fig. 8, the output voltage fundamental component amplitude with the frequency of 50 Hz is equal to 330 V. The seven level output voltage is depicted in Fig. 9.
In order to evaluate the system dynamics, a sudden resistance load change from 100 Ω to 50 Ω is applied at time t = 0.5 s. At time t = 1 s the load resistance is changed from 50 Ω to 100 Ω again. Figure 10 illustrates good dynamic responses during sudden load variations for the output voltage and current.

Experimental Results
The Matlab Waijung Simulink blockset is used to automatically generate STM32F407 discovery ARM based microcontroller bin code from Simulink block diagrams. The code is used to implement the proposed multilevel grid connected control strategy. An electronic circuit is implemented for sensing analog voltage and current signals.
Six digital PWM signals and corresponding gate driver electronic circuits are used to generate the IRF840 MOSFET gate driving pulses. The circuit components values are as selected in the simulation results section. Figure 11 illustrates an experimental prototype of the proposed 3-cell PUC based grid connected 7-level inverter. A high concordance between simulation and experimental results of the proposed multilevel grid connected inverter could be concluded. The seven level output voltage is depicted in Fig. 12, which is similar to the simulation result shown in Fig. 9.

Conclusion
In this paper a novel packed U cell (PUC) based multilevel grid connected inverter was presented. Unlike the U cell arrangement which consists of two power switches and one capacitor, in the proposed converter topology, a lower DC power supply from renewable energy resources such as photovoltaic arrays (PV) is used as a base power source. The proposed topology offers higher efficiency and lower cost using a small number of power switches and a lower DC power source which is supplied from renewable energy resources. Other capacitor voltages are extracted from the base lower DC power source using isolated DC-DC power converters. The operation principle of proposed transformerless multilevel grid connected inverter was analyzed theoretically. Operation of the proposed multilevel grid connected inverter was verified through simulation studies. An experimental prototype using STM32F407 discovery controller board was performed to validate the simulation results.