Customized binary and multi-level HfO2−x-based memristors tuned by oxidation conditions

The memristor is a promising candidate for the next generation non-volatile memory, especially based on HfO2−x, given its compatibility with advanced CMOS technologies. Although various resistive transitions were reported independently, customized binary and multi-level memristors in unified HfO2−x material have not been studied. Here we report Pt/HfO2−x/Ti memristors with double memristive modes, forming-free and low operation voltage, which were tuned by oxidation conditions of HfO2−x films. As O/Hf ratios of HfO2−x films increase, the forming voltages, SET voltages, and Roff/Ron windows increase regularly while their resistive transitions undergo from gradually to sharply in I/V sweep. Two memristors with typical resistive transitions were studied to customize binary and multi-level memristive modes, respectively. For binary mode, high-speed switching with 103 pulses (10 ns) and retention test at 85 °C (>104 s) were achieved. For multi-level mode, the 12-levels stable resistance states were confirmed by ongoing multi-window switching (ranging from 10 ns to 1 μs and completing 10 cycles of each pulse). Our customized binary and multi-level HfO2−x-based memristors show high-speed switching, multi-level storage and excellent stability, which can be separately applied to logic computing and neuromorphic computing, further suitable for in-memory computing chip when deposition atmosphere may be fine-tuned.

In order to overcome the physical limit in the scaling-down of traditional memories, memristor 1, 2 is considered to be a promising next generation non-volatile memory 3 for its high speed 4 , low power consumption 5 , multi-level data storage 6 and so forth. In various applications, there are different pursuits for the device performances. For example, logic computing 7, 8 requires high speed and large R off /R on window, which could be considered as a demand of binary mode. On the other hand, the potentials of multi-level storage and low power consumption are considered to be crucial for high-density memory 9, 10 and neuromorphic computing [11][12][13][14] , which prefer the multi-level mode instead. Aiming at these two distinct applications, it is natural that different materials may be utilized to meet their particular requirements in the performance. Nevertheless, considering the compatibility to standard CMOS flowline, hafnium oxide 15 , which has already found its way as high-k gate dielectrics in CMOS transistors, is of special technological interest. It is highly worthwhile to examine the possibility of employing hafnium oxide for both applications.
Currently, both binary mode with sharp resistive transition and multi-level mode with gradual resistive transition have been observed in various memristors [16][17][18][19][20][21] . Nanosecond binary switching and multi-level operation by modulating SET current and RESET voltage have been reported [22][23][24] . However, such I/V amplitude modulations of multi-level operation are unsuitable for modern circuit applications and they show no advantage in operation voltage scaling-down if lower power supply is further required 25,26 . For instance, 200 ns pulse modulation was used to achieve four-level data storage by complex Gd doping into HfO 2−x process 27 . But for in-memory computing chip 28 , this is not the best solution taking into account the complexity of process and the limited number of levels. Therefore, the simple unified material process to customize double modes for practical applications is of great significance. On the one hand, the unified material process to achieve different functions in one chip is the general trend with the development of in-memory computing chips. On the other hand, it is difficult for a universal type memristor to manifest extreme performance in a certain aspect, since it ought to achieve a trade-off in all device parameters. In the premise of compatibility with CMOS 29,30 , customized memristors, however, can perfectly meet practical demands and improve the specificity and efficiency of chips accordingly. Further, as the mobile terminal becomes widespread, low operation voltage in memory devices turns out to be more energy-efficient [31][32][33][34] . Thus, the forming-free [35][36][37] and low operation voltage were pressing issues for commercialization of memristor. Because of the natural consistency between the low operation voltage and high oxygen vacancies concentration in the sub-stoichiometric memristor 38,39 , it is worthwhile to further explore the sub-stoichiometric devices to meet the customized demands. S. U. Sharath et al. 40 proposed a scheme towards forming-free resistive switching in oxygen engineered HfO 2−x . However, sub-stoichiometric films tuned by the oxidation conditions and further research of customized memristor with binary and multi-level modes were not carried out. As described above, it is desirable to customize memristor with double modes, forming-free and low operation voltage in unified HfO 2−x material.
In this study, we fabricated an 8 × 8 Pt/HfO 2−x /Ti crossbar array. By simply adjusting the O 2 /Ar ratio 36, 37 of reactive sputtering in unified HfO 2−x material, we obtain different O/Hf ratios of HfO 2−x films. For film composition, the peak area ratio and binding energy of O and Hf from XPS spectrograms are crucial to confirm these O/ Hf ratios. For conduction mechanism, Ohmic conduction and Schottky emission are expected to confirm at different states by I/V and I V ln / curves fitting. For electrical characteristics, the distinctions in bipolar resistive behaviors of these memristors were researched in I/V sweep mode. Further, the voltage differences of resistive transitions (from HRS to LRS) were calculated for the next customized mode. For the binary mode, speed and stability are critical properties. In the pulse modulation, the sharp resistive transitions were realized by high-speed response (10 ns, 10 3 pulses) and device stability was verified by retention test 41 (85 °C, >10 4 s), respectively. For the multi-level mode, the potential of multi-level storage can be characterized by compliance current modulation. Further, given practical circuits, the stable 12-levels resistance states were achieved by ongoing multi-window switching of different pulse widths.

Results
Characterization of the films and devices. In order to characterize the microstructure of the Pt/HfO 2−x / Ti crossbar array, the electrical microscopy was utilized. An 8 × 8 crossbar array in MIM structure is shown in Fig. 1(a) by the scanning electron microscope(SEM). The HfO 2−x film deposited by adjusting the O 2 /Ar ratio is the functional layer, whose single device is observed in the enlarged part. Obviously, the vertical cross sections are the electrodes, where the brighter is Pt and the other is Ti. The sharp interfaces between the HfO 2−x layer and two electrodes were clearly identified in Fig. 1(b), characterized by transmission electron microscopy (TEM). The interfaces of 20 nm HfO 2−x film are apparent after repeated switching cycles 42,43 .
To quantitatively analyze the atomic ratio O/Hf in the HfO 2−x functional layers with respect to the O 2 /Ar ratio of reactive sputtering, the X-ray photoelectron spectroscopy(XPS) measurement was utilized. Figure 2 Table 1 summarizes the XPS features of the HfO 2−x films.   that the fluctuations of forming and SET voltages become larger. Even so, the maximum fluctuations of forming and SET voltages are not more than 2 V and 1 V. Figure 4(a,b,c) shows the I/V hysteresis loops for about 50 cycles in samples A, C and E, whose R off /R on windows (10, 100 and 500) are drastically increasing. Although higher O/Hf ratios (less inherent oxygen vacancies) lead to higher high resistance state (HRS) and low resistance state (LRS), the increasing R off /R on windows indicate a greater increasing of the HRS. Meanwhile, the processes of forming conductive filaments are much longer for the low O/Hf ratio devices, meaning that they reach the low resistance state (LRS) undergoing longer voltage differences (ΔV). The voltage differences of the samples A (ΔV A = 1.015 V), C (ΔV C = 0.24 V) and E (ΔV E = 0.065 V) are drastically reduced along with the increasing O/Hf ratios in the black curves. This phenomenon can be explained by the argument that the SET process of the oxygen vacancies-enriched memristor is a process of thickening the conductive filaments. The low O/Hf ratio memristors start to form the conductive filament at lower voltage and undergo longer voltage differences to reach the LRS. For the high O/Hf ratios, undergoing shorter voltage differences means much sharper for resistive transitions. They start to flip over at higher voltages (higher energy) and form the conductive filaments from none to multiple roots instantly. In this paper, customized binary and multi-level modes are just pointed out based on the difference between rapid voltage jump and controllable thickening process. As a comparison, these black curves with typical resistive transitions are shown in the inset of Fig. 4(a,b,c) with horizontal coordinates of positive voltage and absolute negative voltage. The asymmetry of the devices can be found by comparing their positive and negative voltage jump points. The XRD patterns indicate that all HfO 2−x films of samples are amorphous shown in Fig. 4(d). As S. U. Sharath et al. 45 reported the representative phase structure of hafnium oxide films, the growth temperature and oxidation conditions have a crucial effect on the structure of HfO 2−x films. The growth at room temperature dominates the amorphous structure, while the oxygen vacancies further aggravate it.

Forming-free, low operation voltage and other bipolar behaviors.
The curves fitting and mechanism analysis. Comparative SET processes are carried out to study the conduction mechanism. As shown in Fig. 5(a), four I/V states (HRS in low voltage, HRS in high voltage, LRS in high voltage and LRS in low voltage) are named state 1, state 2, state 3 and state 4 for simple notation. The slopes of samples A, C and E at state 1 are approximately 1 in the double logarithmic coordinates, which indicate that the memristors are in Ohmic conduction at this state shown in Fig. 5(a). As the voltage increases, all curves bend   upward at state 2. Considering that Pt has high work function (5.65 eV), which is much higher than the electron affinity of HfO 2−x , the Schottky barrier is inevitably formed at the Pt/HfO 2−x interface. The inset shows linear fits of I V ln / to confirm the Schottky emission at state 2 30, 46-48 . The previous I/V hysteresis loops show obvious asymmetry in the inset of Fig. 4(a,b,c), further supporting the interface-limited Schottky emission mechanism. This phenomenon can be explained by the insufficient energy for the electron to surmount the barrier (emission threshold) at state 1. When the SET voltage exceeds the emission threshold, the Schottky emission exponentially increases and dominates the conduction mechanism. However, when the device transforms from the HRS to the LRS, conductive filaments are formed and Ohmic conduction are established. As most research works reported the presence of multiple filaments in oxide memristors [49][50][51] , we envisage a scenario as below. Only a few conductive filaments have punched through the electrodes, while most filaments remain in the partial form, such that the state 3 is actually the result of the combination of Ohmic conduction and Schottky emission. As the SET voltage is less than the threshold, the Schottky emission is gradually diminished and the Ohmic conduction dominates the conductive mechanism again at state 4. Figure 5(b) shows the initial Schottky barriers of the samples A, C and E. Although Pt electrodes of the samples A, C and E have same work function, the electron affinities of non-intrinsic HfO 2−x films are different due to their dispersed oxygen vacancies concentrations. Therefore, the Schottky barriers of the Pt/HfO 2−x interfaces gradually increase from samples A to E, which is also responsible for the increasing forming and SET voltages. The inset (i)(ii)(iii) show the reduction of inherent oxygen vacancies in the non-intrinsic HfO 2−x films of samples A, C, and E. The distinctions of inherent oxygen vacancies are tuned by oxidation conditions. It should be noted that the amount of oxygen vacancies at the Ti/HfO 2−x interface is much larger than those at the other position of the films.
The microscopic mechanism of the Pt/HfO 2−x /Ti memristor was summarized as follows. On the one hand, due to the active characteristic of Ti, oxygen atoms will be extracted from the HfO 2−x films to form Titanium oxide 52 . On the other hand, the non-intrinsic HfO 2−x films have several oxygen vacancies in a certain extent. The combination of the two reasons makes the devices contain oxygen vacancies in initial state, providing a congenital condition to reduce forming and SET voltages. When the positive voltage is applied to the Ti electrode, the Ti/ HfO 2−x interface oxidation is enhanced, at the same time the oxygen vacancies in the HfO 2−x film migrate toward the Pt electrode. A large amount of oxygen vacancies accumulate at the Pt/HfO 2−x interface to lower the valency of Hf 25 and form oxygen vacancies conductive filaments through the Schottky barrier of Pt/HfO 2−x interface, transforming the devices into the LRS. When the negative voltage is applied to the Ti electrode, the oxygen ions migrate toward the Pt electrode, i.e., the oxygen vacancies are considered to be extracted from the Pt/HfO 2−x interface. At the interface, the transition proceeds in the following sequence: (i) the concentration of oxygen vacancies decreasing; (ii) the valency of Hf increasing; (iii) the conductive filaments breaking, eventually transform the devices back to the HRS.
Binary and multi-level memristive modes. The distinctions in resistive transition of different O/Hf ratio memristors are expected to customize operation modes. The process of resistive transition is gradual for low O/ Hf ratios, while the high O/Hf ratios transform sharply, which has been shown above. Taking into account the demand of R off /R on windows, Samples B and E are selected as representatives of low and high O/Hf ratios to study. The compliance currents are applied to observe whether they have stable multi-level resistance states. Sample B can be stably located at different resistance levels by setting different compliance currents as shown in Fig. 6(a). The discrete resistive transition of SET and RESET processes show that the memristor has the multi-level potentials. The inset further shows stable resistance states (from 1 kΩ to 200 kΩ), which are obtained in above different compliance currents. In addition, this memristor has the advantages of low forming voltage (2 V) and SET voltage(1.4 V), which can effectively reduce power consumption.
In Fig. 6(b), Sample E shows dense I/V curves near the 0 V voltage even if different compliance currents are set. The sharp resistive transitions would contribute to the high-speed switch response 53,54 . The inset shows the device transforms obviously in SET (at 2 V) and RESET (at −3.5 V) processes of 100 cycles I/V hysteresis loops, which further proves that the memristor prefers binary mode. Compared to multi-level mode, the binary mode sacrifices higher operation voltage, but larger window and faster response can be obtained instead.
The high-speed pulse test is further completed in order to make it close to the practical customized modes and demonstrate their speed advantage. Figure 6(c) shows different resistance states (12 levels) by ongoing multi-window switching of different pulse widths. The pulses of 10 ns, 20 ns, 30 ns, 50 ns, 100 ns and 1 μs are applied to Sample B, and each pulse has completed 10 switching cycles. The switching response in each pulse width exhibits excellent stability, which can be characterized by stable resistance states. The R off /R on windows extend upward (HRS) and downward (LRS) with increasing pulse widths, which is feasible to realize multi-level data storage.
As a contrast, Fig. 6(d) shows the excellent binary performance of sample E. It can achieve approximate 10 times R off /R on window and 10 3 serial tests 55,56 in high-speed (10 ns) pulses. Compared with the 10 ns-response of sample B, the larger window and longer test times of sample E further support its superiority for binary mode. The inset shows the retention tests at 85 °C (>10 4 s). The LRS and HRS retention characteristics after the 999th and 1000th high-speed pulses are shown in blue curves. The LRS exhibits excellent stability and the HRS fluctuates slightly after the practical high-speed pulse operation.

Discussions and Conclusions
This work is guided by the conduction mechanisms due to oxygen vacancies. Because of the natural consistency between high oxygen vacancies concentration and low operation voltage in sub-stoichiometric memristor, it is worthwhile to further explore the sub-stoichiometric devices to realize low voltage operation. Further, due to the distinction in inherent oxygen vacancies concentration, these sub-stoichiometric memristors show differences in the process of forming the conductive filaments. It is conceivable that these differences may be utilized to achieve binary and multi-level modes, which will be beneficial to pursuing different performances in memristor. For these different fields, the characteristic tests of relevant applications are thus completed.
In summary, customized HfO 2−x memristor is constructed to realize binary and multi-level modes tuned by oxidation conditions. The O/Hf ratios of the HfO 2−x films are modulated by adjusting the O 2 /Ar ratio of reactive sputtering. Forming-free and low operation voltage were confirmed for low O/Hf ratio memristors at the same time large R off /R on window and sharp resistive transition were found for high O/Hf ratio memristors. Further, the sharp and gradual resistive transitions can be utilized to customize binary and multi-level modes, respectively. For binary mode, 10 3 pulses (10 ns) are serially applied to realize resistive switching of approximate 10 times R off / R on window, which still maintains excellent stability at 85 °C (>10 4 s). For multi-level mode, 12-levels resistance states and 10 switching cycles of each pulse width have been completed by ongoing multi-window switching of incremental pulse widths. Besides, Ohmic conduction and Schottky emission mechanisms were confirmed at different states. Taking into account the distinctions of applied mode and operation voltage, these binary and multi-level memristors in unified HfO 2−x material can be applied to logic computing, neuromorphic computing and in-memory computing chip.

Methods
Device fabrication. A silicon substrate with a thin silicon dioxide layer was pre-cleaned to avoid contamination from the ambience. The bottom electrode pattern was lithography by a well-designed mask, and 120 nm Ti thin film was deposited by DC sputtering. The HfO 2−x functional layer of the small square pattern was likewise lithography after the previous lift-off process. 20 nm HfO 2−x films were deposited by adjusting the O 2 /Ar ratio of reactive sputtering to achieve customized memristor. Finally, after another lift-off and lithography process, a 120 nm Pt film as top electrode was deposited by DC sputtering and then lifted off last time. The finished memristor of 8 × 8 Pt/HfO 2−x /Ti crossbar array was completed by binding and used for various tests. Device structure and film composition. The microstructure of the device was monitored by scanning electron microscope (SEM) and the cross-sectional structure was monitored by transmission electron microscopy (TEM) using FEI Quanta 200 and Tecnai G2 20 equipment, respectively. The amorphous structure of the HfO 2−x films was examined by X-ray diffraction (XRD) using PANalytical PW3040-60 MRD. The atomic concentration in the HfO 2−x films was characterized by X-ray photoelectron spectroscopy (XPS) using an AXIS-ULTRA DLD-600W system. Electrical characterization. The DC electrical characteristics were carried out with an Agilent B1500A semiconductor parameter analyzer in I/V sweep mode. And the high-speed pulse response was collected by Keithley 4200 semiconductor parameter analyzer. The retention tests at 85 °C were performed on a Cascade Microtech M150 probe system equipped with a thermal chuck (0.1 °C accuracy), which was periodically (every one second) monitored by Agilent B1500A with a low read voltage (0.1 V) in I/V-t Sampling mode. For all the electrical measurements, the top electrodes (Pt) were grounded while the bottom electrodes (Ti) were biased.