Realisation of topological zero-energy mode in bilayer graphene in zero magnetic field

Bilayer graphene (BLG) gapped by a vertical electric field represents a valley-symmetry-protected topological insulating state. Emergence of a new topological zero-energy mode has been proposed in BLG at a boundary between regions of inverted band gaps induced by two oppositely polarized vertical electric fields. However, its realisation has been challenged by the enormous difficulty in arranging two pairs of accurately aligned split gates on the top and bottom surfaces of clean BLG. Here we report realisation of the topological zero-energy mode in ballistic BLG, with zero-bias differential conductance close to the ideal value of 4 e 2/h (e is the electron charge and h is Planck’s constant) along a boundary channel between a pair of gate-defined inverted band gaps. This constitutes the bona fide electrical-gate-tuned generation of a valley-symmetry-protected topological boundary conducting channel in BLG in zero magnetic field, which is essential to valleytronics applications of BLG.


Results
The zero-energy states in BLG. The low-energy state of intrinsic BLG, Bernal-stacked two monolayer graphene sheets, can be approximated by massive chiral quasiparticle bands without a band gap as the leading term of the interlayer coupling is considered in the Hamiltonian of BLG; however, a band gap is induced and tuned by the broken inversion symmetry in an external electric field applied perpendicular to the plane of a BLG layer 12,13 . The gate-tunability of the band gap and carrier density of BLG has been conveniently utilized for effective carrier confinement [14][15][16][17] and has led to a theoretical proposition for a new type of symmetry-protected topological one-dimensional (1-D) channel of zero-energy mode in BLG 8,9,11,18 . the BLG layer ( Fig. 1a and b). For opposite polarities of → E L and → E R , the band gap closes and reopens with inverted chirality at the boundary between the two gapped BLG regions. Thus, the gapless boundary is topologically protected in the absence of valley-mixing perturbations 8,10 . There are two 1-D valley-momentum-locked zero-energy states with opposite chirality for each valley (Fig. 1c). Thus, the zero-bias differential conductance (dI/dV) along the boundary has a quantized conductance of 4 e 2 /h as long as inter-valley scattering is absent. Here, the factor of 4 comes from the spin degeneracy and the two copropagating modes in a valley in the current direction. Because the symmetry-protected topological zero-energy mode in BLG is vulnerable to valley-mixing perturbations 19 , prevention of inter-valley scattering is key to demonstrating the topological 1-D mode with ideal 4 e 2 /h conductance. Conductance values falling short of 4 e 2 /h observed in a previous study 20 for an AB-BA-stacked domain boundary in BLG were caused by valley-mixing scattering with diffusive transport in the device. Also a recent report on the zero-bias conductance in split dual-gated BLG 21 similar to ours showed much smaller values (~0.5 e 2 /h) than the prediction by disorder-induced high backward scattering at the domain boundary. In the study, the conductance of ~4 e 2 /h were attained only when the 1-D backward scattering was suppressed in a high magnetic field. In this case, however, the quantized conductance of the ordinary quantum Hall edge transport may have contributed to the intended boundary-channel conductance. Thus, to clearly confirm the formation of the valley-symmetry-protected topological 1-D zero-energy mode at the boundary between the inverted band-gap regions in BLG, observation of the conductance of 4 e 2 /h is highly required without applying a high magnetic field.
Zero-bias conductance along the kink-potential. Figure 1d Fig. 1e were determined by SEM and atomic force microscopy (AFM) 22,23 . A negative resistance in the van der Pauw configuration confirms the ballistic transport of carriers within the device size (see Supplementary Fig. 1).  The colour map of Fig. 2a shows the V TL,TR and V BL,BR gate-voltage dependence of the zero-bias dI/dV in the symmetric-gate configuration. A typical feature of this dual-gated BLG is clearly seen in Fig. 2a with suppressed conductance (insulating behaviour, see Supplementary Note 1) at the upper-left and lower-right regions, even with a narrow corridor that was not covered by top and bottom gates at the centre of the device (see Fig. 1). The gating effect of the split gates was maintained across the corridor with little degradation compared with dual-gated BLG (see Method and Supplementary Fig. 2). Following the convention of the previous study 12 , we define the displacement field as , and ẑ is the unit vector normal to the BLG sheet. From Fig. 2a, the CNP was determined to be . The magnitude of the average displacement field, , determines the size of the band gap (E gap ), and the total carrier density in BLG is estimated by . Along the diagonal track from region 'α' to 'β' in Fig. 2a, the Fermi level (E F ) is maintained in the middle of the E gap while E gap increases away from the CNP. Figure 2b shows the conductance for an asymmetric-gate configuration with fixed V TL (=12.9 V) and V BL (=−16 V), while V TR and V BR were varied as shown in Fig. 2e. Thus, the left region of the BLG was fixed in an insulating state (at the region β in Fig. 2a), while the right region covered the entire state in   Figure 2g (h,i) shows slice traces corresponding to the dashed lines in Fig. 2a (b,c) for given values of V BL,BR (V BR ). It is clear that the minimum conductance in each trace (corresponding to a charge neutral state in the right region) approaches 4 e 2 /h of the valley-symmetric topological mode (horizontal solid lines) only for

Current-voltage characteristics of the 1-D conducting channel in BLG.
Topologically trivial (non-chiral) bound states also form at the potential well (kink-potential) along the corridor. However, these bound states are separated by a finite energy from E F , which remains in the middle of the band gap along the diagonal track in Fig. 2a. Thus, the zero-bias dI/dV plotted in Fig. 2a-c is attributed to the zero-energy state formed at the kink-potential well. This fits with the theoretical prediction of valley-symmetry-protected topological zero-energy mode in the BLG 8,10 . This assertion is more clearly justified by examining the current-voltage (I-V) characteristics of the 1-D conducting channel along the corridor for , with E F fixed in the middle of the band gap. Figure 3a (b) shows I-V curves obtained for the asymmetric-gate configuration illustrated in Fig. 2e (f). For the measurements, the value of → ⋅D z L was fixed at −1.0 V/nm (+1.12 V/nm) while that of → ⋅D z R was varied from positive (the region α in Fig. 2a) to negative (the region β in Fig. 2a). Each trace in Fig. 3a   by assuming a conducting channel at zero energy. The slope of I-V for → ⋅ → < D D 0 L R increases for high values of V b as additional conducting channels existing at finite energies participate in conduction.
The increase of channel conductance in the higher bias range in Fig. 3 is due to the emergence of the topologically trivial additional transverse conducting modes that are confined in the kink potential well along the corridor. Calculation of the energy levels in the kink potential based on the full structure of the Hamiltonian in BLG has been reported previously 18,21 . It predicts that the energy of the lowest bound level of the trivial conducting state is a few tens of meV. In fact, in Fig. 3, the observed differential conductance dI/dV starts to increase abruptly for the bias voltage V b above a certain threshold value larger than ~10 meV. We believe that the threshold voltage corresponds to the lowest bound energy level ε 1 of the topologically trivial modes. Thus, the trivial conducting channels are distinctly separated from the topological zero-energy mode and the zero energy conductance observed in this study corresponds entirely to the topological conducting modes predicted theoretically. However, the conductance in Fig. 3 increases without any step-like features at the quantized eigenenergies of the trivial conducting levels, ε n . This feature arises because transport in the topologically trivial non-chiral bound states along the narrow conducting channel was not necessarily ballistic, as these states were not protected from non-valley-mixing perturbations, such as long-range scattering. The rapid increase of the conductance for high biases is due to conduction through the continuum state. The probing voltage level for the conductance map in Fig. 2 is ~0.5 mV which is far less than the lowest bound-state level of ~10 mV for the trivial bound states. The chiral zero-energy modes are clearly differentiated from the contribution of the topologically trivial non-chiral conducting channels.
An analysis in association with another four-gated device indicates that the precise alignment of two pairs of split gates within a few nanometres is of prime importance for observing topological 1-D conduction. In addition, controlling the thicknesses of the bottom and top hBN layers as close as possible is also essential, as the thickness ratio of the two hBN layers governs the symmetry of the top and bottom gating (see Supplementary Figs 3-5 and Supplementary Note 2). The thickness ratio was ~1.26 for the device in Fig. 1d.

Discussion
The zero-energy conducting mode observed in this study is robust as long as the valley symmetry is conserved along the corridor, similar to the robustness of the chiral edge mode protected by the time reversal symmetry in a quantum spin Hall insulator. The BLG layer in our device, encapsulated by two clean hBN single crystals, leads to the ballistic transport within the device size as shown in Supplementary Fig. 1. In addition, since the conducting channel is established inside the BLG away from the atomically rugged edge, valley-mixing scattering is suppressed significantly 24 . Although there may be some scattering sources such as localized states confined in the kink-potential corridor, the energy levels of those confined states are located sufficiently away from the zero energy and thus the ZBDC is hardly affected by them.
In our device, two ends of the corridor are connected to each wide region of BLG encapsulated by two hBN layers with only bottom gate. Therefore, in these two wide regions of BLG, the Fermi levels are located at the conduction bands with ballistic transport. In this case, the wide regions of the BLG become the electron reservoirs, taking a role of source and drain contacts to the 1-D conducting channel at the corridor. According to the Landauer-Buttiker formalism, the conductance of a 1-D conducting channel is determined by the potential drop at the interfaces between the reservoirs and the constricted 1-D channel. Thus, the potential drop between the wide BLG regions, on the sides of source and drain, and the corridor in our device are already included in the measured channel conductance.
The manipulation of the valley degrees of freedom, which is at the core of this study, in various two-dimensional (2-D) materials has attracted enormous attention due to their possible utilization in dissipationless valleytronics applications. However, most previous studies on the subject have focused on optical manipulation. The study of transport based on the valley degrees of freedom is still in its infancy; a valley-specific transport signal has been reported only for non-local measurements in Hall-bar-type devices 25,26 . The 1-D topological carrier guiding demonstrated in this study affords a promising route to valleytronic applications and sophisticated valley associated functionalities based on 2-D materials.

Methods
Stacking procedure. For device preparation, we first encapsulated a BLG sheet between two atomically clean hexagonal boron nitride (hBN) single crystals 22,23,27 . A Gel-film (Gel-Pak, PF-30/17-X4) was attached to a slide glass, to be used as a stamp. The hBN flakes (bottom hBN) were then mechanically exfoliated onto the Gel-film using the 'Scotch tape' method 27 . The prepared stamp (bottom hBN/Gel-film/slide glass) was affixed to an optical microscope to pick up a piece of BLG, which was transferred onto a highly doped silicon wafer capped with 90-nm-thick SiO 2 (SiO 2 /Si). After picking up the BLG, the assembled stack (bottom hBN/BLG) was deposited onto the target hBN (top hBN), which had been exfoliated onto another SiO 2 /Si substrate coated with double layers of polymer film consisting of water soluble poly(4-styrene sulfonic acid) (PSS) and poly(methyl methacrylate) (PMMA). Then the prepared substrate was floated on deionised water, which dissolves the PSS layer. When the SiO 2 /Si substrate was detached from the PMMA film, which supported the hBN/BLG/hBN heterostructure, the PMMA membrane was affixed to an optical microscope to transfer the assembled structure onto the split bottom gates patterned on another SiO 2 /Si substrate using standard electron-beam lithography (see Supplementary Fig. 6).
Patterning procedure. After patterning the split bottom gates, which consisted of Cr/Au (5 nm/15 nm) double layers, the hBN/BLG/hBN heterostructure was transferred onto the double layers within sub-micrometre accuracy by a similar technique to that used in the stacking processes. After patterning the bottom-gate extension leads, electrical contacts to the BLG were made by atomic edge contact, which is a method modified from a previous study 23 (without removal of the bottom hBN). The pair of split-gate pads (1.5 × 1 μm 2 ) consisting of Cr/Au (3 nm/12 nm) double layers were then deposited onto the top hBN with lateral positions aligned within a few nm accuracy by electron-gun evaporation together with electron-beam nanofabrication. During the CF 4 /O 2 plasma etching of the device geometry, each boundary of the two split dual-gated regions in the BLG was removed using the pair of split top gates as etching stencils. To prevent electrical shortage between the BLG and top-gate extension leads, the edge of the BLG was covered with double insulating layers (120 nm-thick Al 2 O 3 and 130-nm-thick cross-linked PMMA), followed by electron-gun evaporation of the top-gate extension leads. See Supplementary  Fig. 7 for details and image for each step.