Architecture of the proposed temperature sensor. (A) A temperature-stable current source was employed to generate a CWT ramp voltage, V
, by charging capacitor C
. (B) A PTAT current source was employed as the temperature sensing core by converting temperature to a corresponding current and generated a PTAT ramp voltage, V
, by charging a digitally-controllable bank of capacitors C
. (C) An analog processing unit consisting of a temperature-stabilized VRG, comparators, and an arbiter was implemented to translate the temperature-encoded analog voltages to digital signals. (D) Schematic of the Arbiter. (E) A digital processing unit processes the information, controls C
, and generates the digital codes corresponding to the ambient temperature. (F) An example operation of the DPU illustrates that C
was tuned via discrete time digital feedback to match the rising time of V
ramp, CWT in RSU.