Abrupt p-n junction using ionic gating at zero-bias in bilayer graphene

Graphene is a promising candidate for optoelectronic applications. In this report, a double gated bilayer graphene FET has been made using a combination of electrostatic and electrolytic gating in order to form an abrupt p-n junction. The presence of two Dirac peaks in the gating curve of the fabricated device confirms the formation of a p-n junction. At low temperatures, when the electrolyte is frozen intentionally, the photovoltage exhibits a six-fold pattern indicative of the hot electron induced photothermoelectric effect that has also been seen in graphene p-n junctions made using metallic gates. We have observed that the photovoltage increases with decreasing temperature indicating a dominant role of supercollision scattering. Our technique can also be extended to other 2D materials and to finer features that will lead to p-n junctions which span a large area, like a superlattice, that can generate a larger photoresponse. Our work creating abrupt p-n junctions is distinct from previous works that use a source–drain bias voltage with a single ionic gate creating a spatially graded p-n junction.

shows the Raman spectrum of the bilayer graphene flake presented in the main text measured with an excitation wavelength of 532 nm.
FIG. S1. Raman spectrum of bilayer graphene flake shown in Figure 1 in the main text 2 II. OPTICAL TRANSPARENCY OF LICLO 4 /PEO We tried using a PEO/LiClO 4 solid electrolyte but found that it was not optically transparent. Though it has been used before for optical measurements [1], it is difficult to apply it locally so that it is uniform and does not contact the back gate.

III. IONIC GATE SCREENING BY HSQ AND PMMA
In order to verify whether HSQ is able to effectively mask the ionic liquid, we fabricated a graphene device which was completely covered with HSQ. The measured resistance as a function of both the top gate and back gate separately is given in Figure S3.
Even though the device is fully covered with HSQ, Figure S3(b) shows that the change in the top gate voltage causes the resistance to change slightly. This change is small and indicative of a low capacitance. On plotting the gating curves of the top gate and back gate on the same scale ( Figure S3(c)), it can be seen that the change in the resistance because of the top gate is comparable to that due to the back gate. This indicates that the capacitance between the electrolytic top gate and graphene is smaller than what would be expected from a few nanometres thick Debye layer and that the high capacitance due to the electrolyte has been suppressed.
We also made another device using PMMA overexposed at a dose of 10000 µC/cm 2 which completely covers the graphene flake. The gating curves for this device are shown in Figure S4. The resistance changes with the top gate and the slope dG/dV T G is more than that of the back gate. However, the magnitude of the change is small compared to that of the back gate. It is possible that there are small areas within PMMA that the ionic liquid can percolate through and affect graphene.
We also applied large top gate voltages (∼ 4.5 V) to the bilayer graphene device that is presented in the main text. This caused corrosion of the electrodes. From the optical image given in Figure S5, we find that the electrodes covered by the HSQ are unaffected, once again indicating that the HSQ is an effective mask for the ionic liquid. Ignoring the quantum capacitance by treating the graphene as a metal, we model the device as a system of conductors as shown in Figure S7. The back gate, graphene and top gate are denoted by 1, 2 and 3 and they overlap vertically with overlap areas A i as indicated.
Neglecting fringing fields, we can write the capacitance matrix relating the charge on each conductor Q i to its potential V i as: The effective capacitance per unit area between the back gate and graphene with the top gate at a fixed potential is C 12 = q 1 /v/f with v 1 = v, v 2 = v 3 = 0 with f as the area on conductor 2 on which charge accumulates (f ≈ A 1 + A 3 ). 8 From the device geometry, we estimate the capacitance with ǫ a = 3.9ǫ 0 , ǫ b = 16.5ǫ 0 [2], A 1 = (425 µm) 2 , A 3 = (80 µm) 2 , b = 1 nm, a = 300 nm, f = (425 µm) 2 . Figure S7 gives the factor of increase in the back gate capacitance as a function of the ionic liquid drop dimension.

VII. FOURIER TRANSFORM ANALYSIS
If z(x, y) = f (ax + b), F z(k x , k y ) = F f (k x /a)δ(ak y − bk x ), where F z and F f are the Fourier transforms of z and f respectively and k = 1/x, Accordingly, if the photovoltage P V is given by: The 13

IX. THERMAL CYCLING STABILITY
We have verified that the p-n junction formed using the technique demonstrated in the paper is not affected by thermal cycling. We have measured both the resistance and photovoltage with before and after 15 thermal cycles between measurements taken at the same top gate voltage. Figures S15, S11  Similarly, the photovoltage has also been measured at 30 K and 60 K and is shown in Figures S13 and S14 , with 15 thermal cycling events between the curves. Here, the difference between the two measurement st is more pronounced. However, the trend is clearly the same.
Each thermal cycling event takes a significant amount of time nearly 4 hours including the time we wait for the sample to stabilize. During this time, any position change of the sample due to thermal drift in the sample stage, or any long-term drift in the z-position of microscope objective that is used to focus light even by a few microns -will result in a change in the intensity and position of light illumination. This can account for the changes we have observe in the photovoltage cycling events shown below.
We noticed a decrease in the top gate capacitance during the first heating and cooling cycle where it decreased from 90 C BG to 40 C BG (C BG : back gate capacitance) and subsequently remained stable over the course of measurements which involved more than 50

X. TEMPERATURE DEPENDENCE
In Figure S15, we have plotted the product of the photovoltage and temperature as a function of the back gate voltage for different top gate voltages. Since the 30 K and 60 K curves overlap, the photovoltage P V ∝ 1/T in this temperature range. 20