Quantum computers can be protected from noise by encoding the logical quantum information redundantly into multiple qubits using error-correcting codes1,2. When manipulating the logical quantum states, it is imperative that errors caused by imperfect operations do not spread uncontrollably through the quantum register. This requires that all operations on the quantum register obey a fault-tolerant circuit design3,4,5, which, in general, increases the complexity of the implementation. Here we demonstrate a fault-tolerant universal set of gates on two logical qubits in a trapped-ion quantum computer. In particular, we make use of the recently introduced paradigm of flag fault tolerance, where the absence or presence of dangerous errors is heralded by the use of auxiliary flag qubits6,7,8,9,10. We perform a logical two-qubit controlled-NOT gate between two instances of the seven-qubit colour code11,12, and fault-tolerantly prepare a logical magic state8,13. We then realize a fault-tolerant logical T gate by injecting the magic state by teleportation from one logical qubit onto the other14. We observe the hallmark feature of fault tolerance—a superior performance compared with a non-fault-tolerant implementation. In combination with recently demonstrated repeated quantum error-correction cycles15,16, these results provide a route towards error-corrected universal quantum computation.
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The data underlying the findings of this work and the quantum circuits are available at https://doi.org/10.5281/zenodo.6244536.
All codes used for data analysis are available from the corresponding author upon reasonable request.
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We acknowledge support from the EU Quantum Technology Flagship grant AQTION under grant agreement number 820495, and by the US Army Research Office through grant number W911NF-21-1-0007; and funding by the Austrian Science Fund (FWF), through the SFB BeyondC (FWF project number F7109), by the Austrian Research Promotion Agency (FFG) contract 872766, and by the IQI GmbH. M. Ringbauer acknowledges funding from the European Union’s Horizon 2020 research and innovation programme under the Marie Skłodowska-Curie grant agreement number 840450. M. Müller acknowledges support by the ERC Starting Grant QNets grant number 804247. S.H. acknowledges funding by the Deutsche Forschungsgemeinschaft (DFG, German Research Foundation) under Germany’s Excellence Strategy ‘Cluster of Excellence Matter and Light for Quantum Computing (ML4Q) EXC 2004/1’ 390534769. The research is also based on work supported by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA), via the US Army Research Office grant number W911NF-16-1-0070. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of the ODNI, IARPA or the US Government. The US Government is authorized to reproduce and distribute reprints for governmental purposes notwithstanding any copyright annotation thereon. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the view of the US Army Research Office.
T.M., R.B. and T.F. are connected to Alpine Quantum Technologies, a commercially oriented quantum computing company.
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Extended data figures and tables
Expectation values of the stabilizer generators and the logical operators of the seven-qubit colour code for the six cardinal states of the Bloch sphere. Results for the non-fault-tolerant and fault-tolerant preparation scheme are depicted in orange and turquoise respectively, whereas results from numerical simulations are shown in lighter coloured bars. 2,500 and 106 runs were performed in the experiment and for simulations for each prepared state, respectively. For the calculation of the expectation values of the logical operators a round of perfect error correction is applied. For the measurements corresponding to the data presented in this figure but also in Fig. 2 the sign of the rotation angle of physical Y-rotations is flipped, effectively implementing an additional deterministic π phase flip on qubit 6 and a π bit flip on qubit 7 at the end of the circuit depicted in Fig. 2a. The effects of this redefinition do not amount to a change of measurement bases and can be readily accounted for in post-processing.
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Postler, L., Heuβen, S., Pogorelov, I. et al. Demonstration of fault-tolerant universal quantum gate operations. Nature 605, 675–680 (2022). https://doi.org/10.1038/s41586-022-04721-1
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