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CMOS-based cryogenic control of silicon quantum circuits


The most promising quantum algorithms require quantum processors that host millions of quantum bits when targeting practical applications1. A key challenge towards large-scale quantum computation is the interconnect complexity. In current solid-state qubit implementations, an important interconnect bottleneck appears between the quantum chip in a dilution refrigerator and the room-temperature electronics. Advanced lithography supports the fabrication of both control electronics and qubits in silicon using technology compatible with complementary metal oxide semiconductors (CMOS)2. When the electronics are designed to operate at cryogenic temperatures, they can ultimately be integrated with the qubits on the same die or package, overcoming the ‘wiring bottleneck’3,4,5,6. Here we report a cryogenic CMOS control chip operating at 3 kelvin, which outputs tailored microwave bursts to drive silicon quantum bits cooled to 20 millikelvin. We first benchmark the control chip and find an electrical performance consistent with qubit operations of 99.99 per cent fidelity, assuming ideal qubits. Next, we use it to coherently control actual qubits encoded in the spin of single electrons confined in silicon quantum dots7,8,9 and find that the cryogenic control chip achieves the same fidelity as commercial instruments at room temperature. Furthermore, we demonstrate the capabilities of the control chip by programming a number of benchmarking protocols, as well as the Deutsch–Josza algorithm10, on a two-qubit quantum processor. These results open up the way towards a fully integrated, scalable silicon-based quantum computer.

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Fig. 1: The cryogenic quantum control system.
Fig. 2: The Horse Ridge cryogenic controller characterized at 3 K.
Fig. 3: Frequency-multiplexed qubit control and fidelity benchmarks with the cryo-controller.
Fig. 4: Programming a quantum processor with the cryo-controller.

Data availability

Data supporting this work are available at

Code availability

The codes used for data acquisition and processing are from the open-source Python packages QCoDeS (available at, QTT (available at and PycQED (available at


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This research was funded by Intel Corporation. We acknowledge discussions with the members in the Spin Qubit team, the Cryo-CMOS team and Intel Corporation, and technical assistance by O. Benningshof, M. Sarsby, R. Schouten and R. Vermeulen.

Author information




X.X., B.P. and J.P.G.v.D. performed the experiment. N.S. fabricated the quantum device. A.S., B.P.W. and G.S. designed, grew and characterized the Si/SiGe heterostructure. A.C. contributed to the preparation of the experiment. X.X. and B.P. analysed the data presented in the main manuscript. F. Sebastiano, M.B., S.P., E.C. and L.M.K.V. conceived and supervised the project. X.X., B.P. and L.M.K.V. wrote the manuscript with input from all authors.

Corresponding authors

Correspondence to Edoardo Charbon or Lieven M. K. Vandersypen.

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Competing interests

The authors declare no competing interests.

Additional information

Peer review information Nature thanks Fernando Gonzalez-Zalba, Stefan van Waasen and the other, anonymous, reviewer(s) for their contribution to the peer review of this work. Peer reviewer reports are available.

Publisher’s note Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Extended data figures and tables

Extended Data Fig. 1 Experiment setup.

The quantum dot device is wire-bonded onto a PCB placed on a cold finger attached to the mixing chamber plate (~20 mK) of a dilution refrigerator (Bluefors XLD). Voltage pulses onto gates RP and LP are generated by the AWG at RT, and go through a low-pass filter (Minicircuits) and attenuators before reaching the device. These pulses are used to control the electrochemical potentials of the quantum dots and load/unload electrons from/to the electron reservoir (see Extended Data Fig. 6). A programmable mechanical switch at 3 K is used to connect gate MW either to a vector signal generator (VSG) at RT or to the cryo-controller at 3 K (represented as two boxes next to the switch) through a 12–14 GHz band-pass filter to filter out wide-band noise. The mechanical switch can also be configured to send the output signals from the cryo-controller to the oscilloscope and the spectrum analyser at RT for electrical characterization in the time and frequency domains. The cryo-controller is programmed via an FPGA to generate the microwave bursts using an external LO signal and a clock (CLK) signal from a microwave signal generator (MSG) at RT. The SET next to the quantum dots is voltage-biased, and the current signal (ISET) through it is converted to a voltage signal through a transimpedance amplifier and digitized by a digitizer card after an analogue low-pass filter employed to remove out-of-band (>10 kHz) noise. ISET is sensitive to the charge occupation of the quantum dots, allowing binary single-shot readout of the qubit states via spin-to-charge conversion (Extended Data Fig. 6).

Extended Data Fig. 2 Dilution refrigerator setup.

a, Location of the cryo-controller and the quantum device inside the dilution refrigerator (left). Top and bottom views of the 3-K plate, showing the mounted chip enclosure and the fixed holder for the enclosure, respectively (right). b, Top view of the gold-plated annealed copper enclosure (without the lid), which is used to mount and thermalize the cryo-controller. c, Ball-grid array (BGA 324) package hosting the cryo-controller chip with on-package decoupling capacitors (shown as a white box in b). d, The Wilkinson power divider (WPD) splits the input LO power into two equal paths with half power in each, implemented on a PCB. Discrete I/Q hybrids that create the in-phase and quadrature-phase components of the input LO are wire-bonded on the PCB for LO distribution between the different transmitters inside the cryo-controller (shown as a red box in b).

Extended Data Fig. 3 Detailed cryo-controller schematic.

a, Detailed representation of the digital circuitry. b. Detailed system-level schematic of the analogue circuity inside the controller.

Extended Data Fig. 4 Power consumption and self-heating of the cryo-controller.

a, Power-consumption pie chart showing the contribution of the digital and analogue circuits in the cryo-controller. A breakdown of the power consumption of individual circuit blocks is shown for the analogue circuits. The digital circuits use a 0.7-V supply and the analogue circuits use a 1-V supply. b, Chip micrograph showing the on-chip bumps used as inputs/outputs. The locations of on-chip temperature-sensing diodes and the analogue and digital circuitry (in TX0) are highlighted. c, On-chip and 3-K plate temperature, measured using different sensors, versus the power consumption of TX0, as reported in ref. 13. The power consumption is varied by changing the clock frequency of the chip. The nominal operating point for the work presented here and the corresponding temperatures are highlighted with a dashed vertical line. All the other transmitters (TX1, TX2, TX3) are switched off in this measurement.

Extended Data Fig. 5 Detailed electrical characterization of the cryo-controller.

a, Schematic of the output driver (complete version in Extended Data Fig. 3) showing the two different RF outputs, which use the same external LO to generate two different frequencies—that is, a 1-GHz band around the LO frequency (fLO) or a 1-GHz band around 3 × fLO—by selecting the ‘RF-Low’ or ‘RF-High’ path, respectively. RF-High uses the third harmonic output of the mixer to generate the tone around 3 × fLO. b, Peak output power versus frequency generated using the RF-Low and RF-High path, respectively, as reported in ref. 13. The output power can be lowered by up to 40 dB below the peak power in the entire frequency range; for example, at 6 GHz the amplitude range is from −56 dBm to −16 dBm. c, Two-tone output spectrum of the cryo-controller used in the simultaneous Rabi oscillation experiment. d, SNR and SFDR of the cryo-controller at various NCO frequencies around 13.54 GHz.

Extended Data Fig. 6 Pulsing scheme used in qubit experiments.

a, Charge-stability diagram of the DQD system, showing the differential current signal (dISET/dVRP) and charge occupation (M, N) (where M denotes the number of electrons in the dot below LP and N represents the number of electrons in the dot below RP) as a function of the voltages applied to gates LP (VLP) and RP (VRP). The three main stages of a typical pulse sequence are marked by the numbered circles. The gate voltages of stage 3 vary between different experiments: in the experiments with exchange coupling turned on, owing to the cross-capacitance between the barrier (gate T) and the plungers (gates RP and LP), the LP and RP voltages differ from those in the experiments without exchange coupling by ~15 mV. b, Schematic representations of the DQD system during the experiment cycle. Q1 is first initialized to its ground state (spin down) via fast relaxation by pulsing to the charge transition line between (1, 0) and (0, 1) (stage 1), which is a spin-relaxation hotspot46. Then, Q2 is initialized by pulsing it to the transition line between (1, 0) and (1, 1) (stage 2), where the Fermi energy of the electron reservoir is placed in between the two spin states of Q2. This allows a spin-down electron to tunnel into the dot but forbids spin-up electrons from tunnelling in—a mechanism called spin-selective tunnelling. During the qubit operations, the system is pulsed to the middle of the (1, 1) region (stage 3), so both electrons are well confined inside the DQD. The barrier (gate T) voltage is used to turn off the exchange coupling between the two spins in the operation of uncoupled qubits (all measurements in Fig. 3) and to turn on the coupling for two-qubit logic operations (all measurements in Fig. 4). After the operations, the Q2 state is read out via spin-selective tunnelling and reinitialized into the spin-down state (stage 2). The state of Q1 is read out by mapping its state onto Q2 via a two-qubit CROT gate (stage 3), followed by readout of Q2 again (stage 2).

Extended Data Fig. 7 Magnetic field gradient.

a, Wafer stack schematic with corresponding layer thicknesses. b, Depth concentration SIMS profile of 28Si (red), 29Si (blue), 30Si (purple), Ge (black), oxygen (green) and carbon (blue). The residual 29Si concentration in the quantum well is 0.08%, considerably reducing qubit decoherence due to hyperfine interaction. Both carbon and oxygen concentrations are below their respective detection limits of 3 × 1016 cm−3 and 1 × 1017 cm−3. c, Schematic showing the first and second Al gate layers in green and purple, respectively. A cobalt micro-magnet is located on top of the metallic gates (pink-shaded area). d, The micromagnet is magnetized by sweeping the external magnetic field (in the \(\hat{z}\) direction) from 0 to 3 T and back to 380 mT. The magnetized micro-magnet provides an additional magnetic field (brown dashed lines) that has a longitudinal (\(\hat{z}\)) component with a field gradient along the double quantum dots. This longitudinal magnetic field gradient (light blue arrows) makes the Zeeman splittings (resonance frequencies) of the two qubits different by ~110 MHz. Additionally, the micro-magnet also induces a transverse (\(\hat{x}\)) magnetic field gradient (green arrows). When a microwave pulse is sent to the device through gate MW, the wave functions of the electrons are oscillating in the \(\hat{z}\) direction. If the microwave frequency is in resonance with the qubit frequency, the electron is subject to an oscillating magnetic field along the \(\hat{x}\) direction, which induces electric-dipole spin resonance29.

Extended Data Fig. 8 Electron temperature measured at different configurations.

a, b, SET current signal (ISET) as a function of RP voltage (VRP) measured at the charge transition between (1, 0) and (1, 1) when the quantum device is connected to the VSG (a) and to the cryo-controller (b) (at zero magnetic field). The electron temperatures are extracted by fitting the curves with the Fermi–Dirac distribution, with a lever arm of 0.172 eV V−1. The measurements indicate that the output noise of the cryo-controller does not affect the electron temperature more than the noise from the RT setup reduced by 6 dB at the 3-K plate.

Extended Data Fig. 9 Rabi oscillations of qubits individually driven by the cryo-controller.

The output frequency of two NCOs are set to the frequencies of Q1 and Q2, respectively, but only one NCO is active each time. Using the same method as described in the main text, the Rabi oscillations of Q1 (a) and Q2 (b) are measured individually. Compared to the simultaneous Rabi oscillations shown in Fig. 3b, the decay is much slower in the individual driving experiments.

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Xue, X., Patra, B., van Dijk, J.P.G. et al. CMOS-based cryogenic control of silicon quantum circuits. Nature 593, 205–210 (2021).

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