# Quantum error correction and universal gate set operation on a binomial bosonic logical qubit

## Abstract

Logical qubit encoding and quantum error correction (QEC) protocols have been experimentally demonstrated in various physical systems with multiple physical qubits, generally without reaching the break-even point, at which the lifetime of the quantum information exceeds that of the single best physical qubit within the logical qubit. Logical operations are challenging, owing to the necessary non-local operations at the physical level, making bosonic logical qubits that rely on higher Fock states of a single oscillator attractive, given their hardware efficiency. QEC that reaches the break-even point and single logical-qubit operations have been demonstrated using the bosonic cat code. Here, we experimentally demonstrate repetitive QEC approaching the break-even point of a single logical qubit encoded in a hybrid system consisting of a superconducting circuit and a bosonic cavity using a binomial bosonic code. This is achieved while simultaneously maintaining full control of the single logical qubit, including encoding, decoding and a high-fidelity universal quantum gate set with 97% average process fidelity. The corrected logical qubit has a lifetime 2.8 times longer than that of its uncorrected counterpart. We also perform a Ramsey experiment on the corrected logical qubit, reporting coherence twice as long as for the uncorrected case.

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## Data availability

The data that support the plots within this paper and other findings of this study are available from the corresponding authors upon request.

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## Acknowledgements

We thank N. Ofek and Y. Liu for suggestions on FPGA programming, and L. Jiang, L. Li and R. Schoelkopf for discussions. L.S. acknowledges support from the National Key Research and Development Program of China grant number 2017YFA0304303 and National Natural Science Foundation of China grant number 11474177. S.M.G. acknowledges grants from ARO W911NF1410011 and NSF DMR-1609326. L.S. also thanks R. Vijay and his group for help on the parametric amplifier measurements.

## Author information

L.H. and L.S. developed the FPGA logic. L.H. and Y.M. performed the experiment and analysed the data with the assistance of W.C., X.M., Y.X. and W.W. L.S. directed the experiment. L.M.D., C.L.Z. and L.S. proposed the experiment. C.-L.Z., Y.W., S.M.G. and L.-M.D. provided theoretical support. W.C. fabricated the JPA. L.H. and X.M. fabricated the devices with the assistance of Y.X., H.W. and Y.P.S. C.-L.Z., S.M.G. and L.S. wrote the manuscript with feedback from all authors.

Correspondence to C.-L. Zou or L. Sun.

## Ethics declarations

### Competing interests

The authors declare no competing interests.

Journal peer review information: Nature Physics thanks P. van Loock and the other anonymous reviewer(s) for their contribution to the peer review of this work.

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## Supplementary information

### Supplementary Information

Supplementary Figures and Methods.

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Hu, L., Ma, Y., Cai, W. et al. Quantum error correction and universal gate set operation on a binomial bosonic logical qubit. Nat. Phys. 15, 503–508 (2019). https://doi.org/10.1038/s41567-018-0414-3

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