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Atomically sharp interface enabled ultrahigh-speed non-volatile memory devices


The development of high-performance memory devices has played a key role in the innovation of modern electronics. Non-volatile memory devices have manifested high capacity and mechanical reliability as a mainstream technology; however, their performance has been hampered by low extinction ratio and slow operational speed. Despite substantial efforts to improve these characteristics, typical write times of hundreds of micro- or milliseconds remain a few orders of magnitude longer than that of their volatile counterparts. Here we demonstrate non-volatile, floating-gate memory devices based on van der Waals heterostructures with atomically sharp interfaces between different functional elements, achieving ultrahigh-speed programming/erasing operations in the range of nanoseconds with extinction ratio up to 1010. This enhanced performance enables new device capabilities such as multi-bit storage, thus opening up applications in the realm of modern nanoelectronics and offering future fabrication guidelines for device scale up.

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Fig. 1: Atomically sharp interfaces embedded in non-volatile memory device with floating-gate configuration built upon van der Waals heterostructures.
Fig. 2: Two-dimensional InSe-based floating-gate memory device with large memory window.
Fig. 3: Programming and erasing non-volatile InSe floating-gate memory devices with large extinction ratio and robust performance.
Fig. 4: Ultrafast operation of memory cell and enabling the multi-bit storage paradigm.

Data availability

Source data are provided with this paper. All relevant data are available from the corresponding authors upon reasonable request.


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We thank Y.-Y. Zhang, S. Du, G. Qian and Z. Zhu for helpful discussions, and H. Yang, J. Li, C. Gu and Q. Huan for assistance in device fabrication and measurement. This work was supported by the National Key Research & Development Projects of China (grant nos. 2016YFA0202300 and 2018FYA0305800), National Natural Science Foundation of China (grant no. 61888102), Strategic Priority Research Program of Chinese Academy of Sciences (CAS; grant nos. XDB30000000 and XDB28000000), Youth Innovation Promotion Association of CAS (Y201902) and Beijing Outstanding Young Scientist Program (BJJWZYJH01201914430039). M.O. acknowledges support from ONR (N000141712885) and NSF (DMR1608720). S.J.P. acknowledges support from the Ministry of Education, Singapore, under a Tier 2 grant (no. MOE2017-T2-2-139). A portion of the research was performed in the CAS Key Laboratory of Vacuum Physics.

Author information




H.-J.G. supervised the overall research. L.B., M.O. and H.-J.G. designed the experiments. L.W., A.W., J.Y. and L.B. fabricated the devices and carried out the electrical measurements. J.S., S.J.P. and W.Z. performed the STEM measurements. A.W. constructed the home-made electric circuit with ultrashort voltage pulse signals with FWHM of 21 ns. L.W., L.B., A.W., J.S., J.Y., W.Z., M.O., S.T.P. and H.-J.G. analysed the data. L.W., L.B., J.S., W.Z., S.J.P., S.T.P., M.O. and H.-J.G. wrote the paper. All the authors contributed to the preparation of the manuscript.

Corresponding authors

Correspondence to Lihong Bao, Min Ouyang or Hong-Jun Gao.

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The authors declare no competing interests.

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Peer review information Nature Nanotechnology thanks the anonymous reviewers for their contribution to the peer review of this work.

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Extended data

Extended Data Fig. 1

Floating-gate memory devices based on 2D materials.

Supplementary information

Supplementary Information

Supplementary Figs. 1–15, Notes 1–5 and refs. 1–7.

Source data

Source Data Fig. 2

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Source Data Fig. 3

Contains bare data for images.

Source Data Fig. 4

Contains bare data for images.

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Wu, L., Wang, A., Shi, J. et al. Atomically sharp interface enabled ultrahigh-speed non-volatile memory devices. Nat. Nanotechnol. 16, 882–887 (2021).

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