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Gate-based high fidelity spin readout in a CMOS device

Abstract

The engineering of a compact qubit unit cell that embeds all quantum functionalities is mandatory for large-scale integration. In addition, these functionalities should present the lowest error rate possible to successfully implement quantum error correction protocols1. Electron spins in silicon quantum dots are particularly promising because of their high control fidelity2,3,4,5 and their potential compatibility with complementary metal-oxide-semiconductor industrial platforms6,7. However, an efficient and scalable spin readout scheme is still missing. Here we demonstrate a high fidelity and robust spin readout based on gate reflectometry in a complementary metal-oxide-semiconductor device that consists of a qubit dot and an ancillary dot coupled to an electron reservoir. This scalable method allows us to read out a spin in a single-shot manner with an average fidelity above 98% for a 0.5 ms integration time. To achieve such a fidelity, we combine radio-frequency gate reflectometry with a latched spin blockade mechanism that requires electron exchange between the ancillary dot and the reservoir. We show that the demonstrated high readout fidelity is fully preserved up to 0.5 K. This result holds particular relevance for the future cointegration of spin qubits and classical control electronics.

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Fig. 1: A CMOS device probed by gate-based RF reflectometry.
Fig. 2: Single-shot spin readout.
Fig. 3: Spin readout error analysis.
Fig. 4: Temperature dependence of the singlet readout fidelity (FS).

Data availability

The data that support the plots within this paper and other findings of this study are available from the corresponding author upon reasonable request.

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Acknowledgements

We acknowledge technical support from P. Perrier, H. Rodenas, E. Eyraud, D. Lepoittevin, I. Pheng, T. Crozes, L. Del Rey, D. Dufeu, J. Jarreau, C. Hoarau and C. Guttin. The European Union’s Horizon 2020 research and innovation programme supports M.U. through a Marie Sklodowska Curie fellowship (ODESI project). E.C. and C.S. acknowledge the Agence Nationale de la Recherche under the programme ‘Investissements d’avenir' (ANR-15-IDEX-02). D.J.N. and C.S. acknowledge the GreQuE doctoral programmes (grant agreement no. 754303). The device fabrication is funded through the Mosquito project (grant agreement no. 688539). This work is supported by the Agence Nationale de la Recherche through the CMOSQSPIN and the CODAQ projects (ANR-17-CE24-0009 and ANR-16-ACHN-0029).

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Contributions

M.U. and T.M. conceived and designed the experiment. M.U., D.J.N., E.C. and T.M. performed the experiment and analysed the data. L.H., S.B. and M.V. designed the MOS devices and managed the fabrication process. M.U. and T.M. wrote the manuscript with input from all the authors.

Corresponding authors

Correspondence to Matias Urdampilleta or Tristan Meunier.

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The authors declare no competing interests.

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Journal peer review information: Nature Nanotechnology thanks Karl Petersson and other anonymous reviewer(s) for their contribution to the peer review of this work.

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Urdampilleta, M., Niegemann, D.J., Chanrion, E. et al. Gate-based high fidelity spin readout in a CMOS device. Nat. Nanotechnol. 14, 737–741 (2019). https://doi.org/10.1038/s41565-019-0443-9

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