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Crested two-dimensional transistors


Two-dimensional transition metal dichalcogenide (TMD) materials, albeit promising candidates for applications in electronics and optoelectronics1,2,3, are still limited by their low electrical mobility under ambient conditions. Efforts to improve device performance through a variety of routes, such as modification of contact metals4 and gate dielectrics5,6,7,8,9 or encapsulation in hexagonal boron nitride10, have yielded limited success at room temperature. Here, we report a large increase in the performance of TMD field-effect transistors operating under ambient conditions, achieved by engineering the substrate’s surface morphology. For MoS2 transistors fabricated on crested substrates, we observed an almost two orders of magnitude increase in carrier mobility compared to standard devices, as well as very high saturation currents. The mechanical strain in TMDs has been predicted to boost carrier mobility11, and has been shown to influence the local bandgap12,13 and quantum emission properties14 of TMDs. With comprehensive investigation of different dielectric environments and morphologies, we demonstrate that the substrate’s increased corrugation, with its resulting strain field, is the dominant factor driving performance enhancement. This strategy is universally valid for other semiconducting TMD materials, either p-doped or n-doped, opening them up for applications in heterogeneous integrated electronics.

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Fig. 1: High-performance MoS2 FET on c-SiNx.
Fig. 2: Substrate morphology dependence of MoS2 FETs.
Fig. 3: Pre-patterning method for improvement of FET performance on a SiO2 substrate.
Fig. 4: FET performance of other TMDs on both c-SiNx and standard SiO2 substrates.

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Data availability

The data that support the plots within this paper and other findings of this study are available from the corresponding author upon reasonable request.


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S.G. acknowledges support from the National Research Foundation, Prime Minister’s Office, Singapore, under the NRF Fellowship Program (award no. NRF-NRFF2012-09) and Competitive Research Program (award no. NRF-CRP13-2014-03). L.T. acknowledges use of facilities in the laboratories of L. K. Ping and C. Wei at the National University of Singapore.

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T.L., S.L. and S.G. designed the project. T.L., S.L. and K.-H.T. prepared substrates and two-probe devices. T.L., S.L. and H.S. performed the two-probe measurements and analysed the results. T.L. and L.C. fabricated Hall bar devices, performed Hall measurements and analysed the results. T.L. and D.X. fabricated devices, performed four-probe measurements and analysed the results. T.L., S.L. and S.G. wrote the manuscript, with input from other authors. All authors contributed to discussions.

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Correspondence to Slaven Garaj.

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Liu, T., Liu, S., Tu, KH. et al. Crested two-dimensional transistors. Nat. Nanotechnol. 14, 223–226 (2019).

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