Abstract

The memristor1,2 is a promising building block for next-generation non-volatile memory3, artificial neural networks4,5,6,7 and bio-inspired computing systems8,9. Organizing small memristors into high-density crossbar arrays is critical to meet the ever-growing demands in high-capacity and low-energy consumption, but this is challenging because of difficulties in making highly ordered conductive nanoelectrodes. Carbon nanotubes, graphene nanoribbons and dopant nanowires have potential as electrodes for discrete nanodevices10,11,12,13,14, but unfortunately these are difficult to pack into ordered arrays. Transfer printing, on the other hand, is effective in generating dense electrode arrays15 but has yet to prove suitable for making fully random accessible crossbars. All the aforementioned electrodes have dramatically increased resistance at the nanoscale16,17,18, imposing a significant barrier to their adoption in operational circuits. Here we demonstrate memristor crossbar arrays with a 2-nm feature size and a single-layer density up to 4.5 terabits per square inch, comparable to the information density achieved using three-dimensional stacking in state-of-the-art 64-layer and multilevel 3D-NAND flash memory19. Memristors in the arrays switch with tens of nanoamperes electric current with nonlinear behaviour. The densely packed crossbar arrays of individually accessible, extremely small functional memristors provide a power-efficient solution for information storage and processing.

Access optionsAccess options

Rent or Buy article

Get time limited or full article access on ReadCube.

from$8.99

All prices are NET prices.

Data availability

The data that support the plots within this paper and other findings of this study are available from the corresponding author upon reasonable request.

Additional information

Publisher’s note: Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

References

  1. 1.

    Chua, L. O. Memristor—the missing circuit element. IEEE Trans. Circuit Theory 18, 507–519 (1971).

  2. 2.

    Strukov, D. B., Snider, G., Stewart, D. & Williams, R. S. The missing memristor found. Nature 453, 80–83 (2008).

  3. 3.

    Liu, T. et al. A 130.7 mm2 2-layer 32 Gb ReRAM memory device in 24 nm technology. In Proceedings of IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 210–212 (IEEE, 2013).

  4. 4.

    Prezioso, M. et al. Training and operation of an integrated neuromorphic network based on metal-oxide memristors. Nature 521, 61–64 (2015).

  5. 5.

    Yao, P. et al. Face classification using electronic synapses. Nat. Commun. 8, 15199 (2017).

  6. 6.

    Sheridan, P. M. et al. Sparse coding with memristor networks. Nat. Nanotech. 12, 784–789 (2017).

  7. 7.

    Li, C. et al. Analogue signal and image processing with large memristor crossbars. Nat. Electron. 1, 52–59 (2018).

  8. 8.

    Pickett, M. D., Medeiros-Ribeiro, G. & Williams, R. S. A scalable neuristor built with Mott memristors. Nat. Mater. 12, 114–117 (2013).

  9. 9.

    Wang, Z. et al. Memristor with diffusive dynamics as synaptic emulators for neuromorphic computing. Nat. Mater. 16, 101–108 (2017).

  10. 10.

    Tans, S. J. et al. Individual single-wall carbon nanotubes as quantum wires. Nature 386, 474–477 (1997).

  11. 11.

    Huang, Y., Duan, X., Wei, Q. & Lieber, C. M. Directed assembly of one-dimensional nanostructures into functional networks. Science 291, 630–633 (2001).

  12. 12.

    Son, Y. W., Cohen, M. L. & Louie, S. G. Half-metallic graphene nanoribbons. Nature 444, 347–349 (2006).

  13. 13.

    Tsai, C.-L., Xiong, F., Pop, E. & Shim, M. Resistive random access memory enabled by carbon nanotube crossbar electrodes. ACS Nano 7, 5360–5366 (2013).

  14. 14.

    Lee, S., Sohn, J., Jiang, Z., Chen, H. & Wong, P. Metal oxide-resistive memory using graphene-edge electrodes. Nat. Commun. 6, 8407 (2015).

  15. 15.

    Green, J. E. et al. A 160-kilobit molecular electronic memory patterned at 1011 bits per square centimetre. Nature 445, 414–417 (2007).

  16. 16.

    Liang, J., Yeh, S., Wong, S. S. & Wong, H.-S. P. Scaling challenges for the cross-point resistive memory array to sub-10 nm node—an interconnect perspective. In Proceedings of IEEE International Memory Workshop (IMW) 61–64 (IEEE, 2012).

  17. 17.

    Fuchs, K. The conductivity of thin metallic films according to the electron theory of metals. Proc. Camb. Philos. Soc. 34, 100–108 (1938).

  18. 18.

    Sondheimer, E. H. The mean free path of electrons in metals. Adv. Phys. 50, 499–537 (2001).

  19. 19.

    Lee, S. et al. A 1 Tb 4b/cell 64-stacked-WL 3D NAND flash memory with 12 MB/s program throughput. In Proceedings of IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 340–342 (IEEE, 2018).

  20. 20.

    ITRS: International Technology Roadmap for Semiconductors, 2015 edn (Semiconductor Industry Association, 2015).

  21. 21.

    Chou, S. Y., Smith, H. I. & Antoniadis, D. A. X-ray lithography for sub-100nm-channel-length transistors using masks fabricated with conventional photolithography, anisotropic etching, and oblique shadowing. J. Vac. Sci. Technol. B 3, 1587–1589 (1985).

  22. 22.

    Baker, L. et al. Nucleation and growth of Pt atomic layer deposition on Al2O3 substrates using (methylcyclopentadienyl)-trimethyl platinum and O2 plasma. J. Appl. Phys. 109, 084333 (2011).

  23. 23.

    Choi, Y., King, T. & Hu, C. A spacer patterning technology for nanoscale CMOS. IEEE Trans. Electron. Dev. 49, 436–441 (2000).

  24. 24.

    Maaroof, A. I. & Evans, B. L. Onset of electrical conduction in Pt and Ni films. J. Appl. Phys. 76, 1047–1054 (1994).

  25. 25.

    Govoreanu, B. et al. 10 × 10 nm2 Hf/HfOx crossbar resistive RAM with excellent performance, reliability and low-energy operation. In Proceedings of 2011 IEEE International Electron Devices Meeting (IEDM), 31.36.31–31.36.34 (IEEE, 2011).

  26. 26.

    Yang, J. J. et al. Engineering nonlinearity into memristors for passive crossbar applications. Appl. Phys. Lett. 100, 113501 (2012).

  27. 27.

    Li, C. et al. Three-dimensional crossbar arrays of self-rectifying Si/SiO2/Si memristors. Nat. Commun. 8, 15666 (2017).

  28. 28.

    Yang, J. J. et al. Memristive switching mechanism for metal/oxide/metal nanodevices. Nat. Nanotech. 3, 429–433 (2008).

  29. 29.

    Li, K. et al. Utilizing sub-5 nm sidewall electrode technology for atomic-scale resistive memory fabrication. In Symposium on VLSI Technology Digest of Technical Papers 131–132 (IEEE, 2014).

  30. 30.

    Celano, U. et al. Scalability of valence change memory: from devices to tip-induced filaments. AIP Adv. 6, 085009 (2016).

  31. 31.

    Miao, F. et al. Anatomy of a nanoscale conduction channel reveals the mechanism of a high-performance memristor. Adv. Mater. 23, 5633–5640 (2011).

  32. 32.

    Lienig, J. Electromigration and its impact on physical design in future technologies. In Proceedings of the 2013 ACM International Symposium on Physical Design 33–40 (ACM, 2013).

Download references

Acknowledgements

This work was supported by the US National Science Foundation (NSF) (ECCS-1253073). Part of the device fabrication work was conducted in the clean room of the Center for Hierarchical Manufacturing (CHM), an NSF Nanoscale Science and Engineering Center (NSEC) located at the University of Massachusetts Amherst. The TEM work used resources of the Center for Functional Nanomaterials, which is a US DOE Office of Science Facility, at Brookhaven National Laboratory under contract no. DE-SC0012704.

Author information

Affiliations

  1. Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, Massachusetts, USA

    • Shuang Pi
    • , Can Li
    • , Hao Jiang
    • , J. Joshua Yang
    •  & Qiangfei Xia
  2. Center for Functional Nanomaterials, Brookhaven National Laboratory, Upton, New York, USA

    • Weiwei Xia
    •  & Huolin Xin

Authors

  1. Search for Shuang Pi in:

  2. Search for Can Li in:

  3. Search for Hao Jiang in:

  4. Search for Weiwei Xia in:

  5. Search for Huolin Xin in:

  6. Search for J. Joshua Yang in:

  7. Search for Qiangfei Xia in:

Contributions

Q.X. conceived and designed the experiments. S.P. fabricated and measured the circuits. C.L., W.X. and H.X. conducted the focused ion beam and TEM characterization. S.P., Q.X., H.J. and J.J.Y. analysed the data. Q.X. and S.P. wrote the manuscript. All authors commented and approved the manuscript.

Competing interests

The authors declare no competing interests.

Corresponding author

Correspondence to Qiangfei Xia.

Supplementary information

  1. Supplementary Information

    Supplementary Figures 1–22, Supplementary Notes 1–6, Supplementary References

About this article

Publication history

Received

Accepted

Published

DOI

https://doi.org/10.1038/s41565-018-0302-0