Abstract
Recently, the increasing demand for data-centric applications is driving the elimination of image sensing, memory and computing unit interface, thus promising for latency- and energy-strict applications. Although dedicated electronic hardware has inspired the development of in-memory computing and in-sensor computing, folding the entire signal chain into one device remains challenging. Here an in-memory sensing and computing architecture is demonstrated using ferroelectric-defined reconfigurable two-dimensional photodiode arrays. High-level cognitive computing is realized based on the multiplications of light power and photoresponsivity through the photocurrent generation process and Kirchhoff’s law. The weight is stored and programmed locally by the ferroelectric domains, enabling 51 (>5 bit) distinguishable weight states with linear, symmetric and reversible manipulation characteristics. Image recognition can be performed without any external memory and computing units. The three-in-one paradigm, integrating high-level computing, weight memorization and high-performance sensing, paves the way for a computing architecture with low energy consumption, low latency and reduced hardware overhead.
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Data availability
Source data are available via Figshare at https://doi.org/10.6084/m9.figshare.24032001. The data that support the plots within this paper and other findings of this study are available from the corresponding authors upon reasonable request.
Code availability
The code that supports the plots in this paper is available via GitHub at https://github.com/zxmbrain/In-sensor-computing-with-dual-gates-devices.
Change history
12 October 2023
A Correction to this paper has been published: https://doi.org/10.1038/s41563-023-01718-7
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Acknowledgements
This work is supported by the National Key Research and Development Program of China (grant no. 2021YFA1200700), National Natural Science Foundation of China (grant nos. T2222025, 62025405, 61825404, 61835012, 62104043, 62104044 and 62174053), the China National Postdoctoral Program for Innovative Talents (grant no. BX2021069), the China Postdoctoral Science Foundation (grant no. 2021M690649), Shanghai Science and Technology Innovation Action Plan (grant nos. 19JC141670, 21JC1402000 and 21520714100) and Open Research Projects of Zhejiang Lab (2021MD0AB03).
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G.W., X. Zhang, Q.L., B.T. and Jianlu Wang conceived the concept. Q.L, B.T. and Jianlu Wang supervised the research. G.W. and J.Z. fabricated the devices. Jingli Wang and M.Z. transferred the array Au electrode. G.W. and G.F. performed the electrical and optoelectronic measurements. X. Zhang, F.Z., C.Y. and K.Z. performed the edge detection and classification tasks. X. Zhang and D.D. designed the test program for the LTD and LTP processes. G.W., G.F., X. Zhao, D.G. and B.T. performed the chip–robot dog interaction video demo. C.D., J.C. and M.L. advised on the experiments and data analysis. All authors discussed the results and revised the manuscript.
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Nature Materials thanks Yang Chai and the other, anonymous, reviewer(s) for their contribution to the peer review of this work.
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Supplementary Figs. 1–23.
Supplementary Video 1
The robot dog movement navigated by the IMSC chip.
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Wu, G., Zhang, X., Feng, G. et al. Ferroelectric-defined reconfigurable homojunctions for in-memory sensing and computing. Nat. Mater. (2023). https://doi.org/10.1038/s41563-023-01676-0
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DOI: https://doi.org/10.1038/s41563-023-01676-0