Functionalized MXene ink enables environmentally stable printed electronics

Establishing dependable, cost-effective electrical connections is vital for enhancing device performance and shrinking electronic circuits. MXenes, combining excellent electrical conductivity, high breakdown voltage, solution processability, and two-dimensional morphology, are promising candidates for contacts in microelectronics. However, their hydrophilic surfaces, which enable spontaneous environmental degradation and poor dispersion stability in organic solvents, have restricted certain electronic applications. Herein, electrohydrodynamic printing technique is used to fabricate fully solution-processed thin-film transistors with alkylated 3,4-dihydroxy-L-phenylalanine functionalized Ti3C2Tx (AD-MXene) as source, drain, and gate electrodes. The AD-MXene has excellent dispersion stability in ethanol, which is required for electrohydrodynamic printing, and maintains high electrical conductivity. It outperformed conventional vacuum-deposited Au and Al electrodes, providing thin-film transistors with good environmental stability due to its hydrophobicity. Further, thin-film transistors are integrated into logic gates and one-transistor-one-memory cells. This work, unveiling the ligand-functionalized MXenes’ potential in printed electrical contacts, promotes environmentally robust MXene-based electronics (MXetronics).


Introduction
][18][19][20][21][22][23][24] However, hydrophilic nature of MXenes remain notable concerns when considering their utilization in electronic circuits.These concerns primarily arise from two factors.Firstly their propensity to interact with atmospheric water and oxygen raises apprehensions regarding potential gradual deterioration of structural and compositional integrity, consequently impacting the electrical properties of MXene nanosheets. 25Secondly, their hydrophilic tendencies contribute to poor dispersion stability in volatile organic solvents, crucial for avoiding undesirable coffee-ring effects during lm deposition and necessitating low drying temperatures. 26,27 ortantly, certain device fabrication processes mandate the use of such organic solvents. 28nsidering that the solution-processed lms consist of an assembly of overlapping MXene nanosheets, the electron transport properties at the interface signi cantly in uence the performance of MXene-based electronic devices.The presence of voids and intercalants impair the inter-ake electron transport properties of MXene lm.For instance, thin lms of MXene nanosheets synthesized by the minimally intensive layer delamination (MILD) method, renowned for its production of high-quality nanosheets, contain Li + ions as intercalants.These hydrophilic Li + ions facilitate the water molecules' penetration through the voids in the MXene lm, entrapping them within the interlayer space. 29,30 esides causing the degradation of MXene, the intercalated water obstructs the e cient ow of charge carriers between the nanosheets in the MXene lm.Consequently, MXene-based devices have yet to demonstrate stable performance under harsh atmospheric conditions. 29Hence, the imperative challenge lies in the modi cation of MXene nanosheet surface characteristics to achieve dispersion stability in volatile organic solvents,, enhance resistance to oxidation, mitigate moisture-induced swelling, and facilitate interake electron transport.Tackling these challenges is crucial for MXenes' effective use in printed electronic devices.
Electrohydrodynamic (EHD) printing technique was chosen for the TFTs fabrication through localized delivery of AD-MXene electrodes, zinc-tin-oxide (ZTO) active layer, and uoro-co-hexa uoropropylene (PVDF-HFP)-based dielectrics.EHD printing offers advantages including ner pattern features and compatibility with various materials and ink viscosities compared to conventional printing techniques. 39- 44However, EHD printing requires low-surface-tension solvents, and cannot use MXenes dispersed in high-surface-tension water (72.8 dyne cm -1 ). 28Such a high-surface-tension solvents require a higher operating voltage, which is associated with voltage risks. 28,45,46 Ehanol's lower surface tension (22.0 dyne cm -1 ) allows EHD printing at reduced voltages, making the excellent dispersion stability of AD-MXene in ethanol (up to 5 mg mL -1 ) advantageous for producing MXene-based highly conductive electrodes. 28The performance of AD-MXene electrodes was compared with those of vacuum-deposited Au and Al electrodes.Furthermore, ADOPA ligands block moisture ingress, providing excellent environmental stability in TFTs with AD-MXene electrodes.They showed negligible changes in their transfer and output characteristics and bias stabilities, even after 30 days of exposure to 60% RH at 25℃.Finally, we assess AD-MXene's potential for integrated circuits, evaluating logic gates (complementary inverter, NAND, and NOR) and memory cells constructed using all-printed AD-MXene electrodes, ZTO active layers, and PVDF-HFP dielectrics.

Results and discussion
Properties of AD-MXene.As illustrated in Fig. 1a, the AD-MXene ink for EHD printing was prepared through facile mixing of aqueous dispersion of MXene with ethanol dispersion of ADOPA ligand at room temperature for around 1 h and subsequent replacement of solvent with ethanol via centrifugation.The ADOPA ligand spontaneously adsorbed onto MXene due to its catechol head strong hydrogen-bonding and π-electron interactions with MXene surface functional groups, and the hydrophobic tail of ADOPA ligand enables the excellent dispersion of obtained AD-MXene in ethanol.The X-ray photoelectron spectroscopy (XPS) spectra for the Ti2p, O1s, C1s, and N1s core levels of AD-MXene and pristine MXene are shown in Fig. 1b and Supplementary Fig. 1.Due to primary amine moiety in ADOPA, AD-MXene shows a clear peak around 399.9 eV in the N 1s region, con rming the attachment of ADOPA (Fig. 1b).To further investigate the interlayer structure and alignment of MXene sheets in the lm, the X-ray diffraction (XRD) patterns of both pristine MXene and AD-MXene lms were recorded as shown in Supplementary Fig. 2. The (002) peak shift from 7.32˚ to 6.38˚ was observed, corresponding to a d-spacing expansion from 1.22 nm to 1.36 nm, resulting from attached ligands.Compared to pristine MXene with poor dispersion properties in ethanol, AD-MXene shows excellent dispersion as shown in Fig. 1c.The eld emission scanning electron microscope (FE-SEM) image in Fig. 1e shows a representative AD-MXene ake from a batch with an average lateral size of 1.81 µm.
Electrical properties of EHD-printed AD-MXene electrodes.As shown in Fig. 2a, the as-prepared ethanolbased AD-MXene ink was loaded into EHD printing equipment and then ejected through the nozzle tip by applying an electric eld between the nozzle and the substrate.The printing conditions were optimized by examining the jetting behavior and tuning the working distance (distance from the nozzle tip to the substrate) and the applied electric eld.Four jetting behaviors, such as dripping, micro-dripping, cone-jet, and multi-jet, were noticed when the working distance and applied voltage were tuned in the ranges of 100-600 µm and 0.5-3.0kV, respectively (Fig. 2b).The AD-MXene ink was printed into line-shaped patterns on a SiO 2 /Si wafer at conditions optimized for uniform jetting in the stable cone-jet mode.
Optical microscope (OM) and cross-sectional eld emission scanning electron microscope images revealed the increased thickness of AD-MXene lines with an increase in the number of printing cycles from 1 to 10 (Supplementary Figs. 3 and 4).Characteristic current-voltage curves of AD-MXene electrodes revealed that the increase in the thickness of lines (or number of printing cycles) enabled the enhanced current ow, while the increase in channel length decreased the current (Fig. 2c, d).Therefore, the EHD printing of AD-MXene with a controlled number of printing cycles and channel length may enable the facile fabrication of conductive wires/resistors of circuitries.The electrical conductivity of the AD-MXene electrode (length = 1 mm, width = 320 µm, and thickness = 192 nm) fabricated by 10 cycles of printing was observed to be 5579 S cm − 1 , which was almost equal to that of the AD-MXene lm fabricated using vacuum-assisted ltration.This is because the ADOPA ligands facilitated the alignment of AD-MXene akes during the EHD printing process and enabled the printed AD-MXene electrodes to have excellent electrical conductivity (Supplementary Fig. S4).We hypothesize that the ligand's planar alignment and strong π-electron interaction with the MXene surface facilitated the inter-ake electron transport; as a result, the AD-MXene lms exhibited electrical conductivity almost equal to that of pristine MXene lm despite having ADOPA ligands as intercalants. 38Notably, the conductivity of AD-MXene electrode (5579 S cm − 1 ) is considerably higher than previously reported poly(3,4-ethylenedioxythiophene)poly(styrenesulfonate) electrodes (0.2-1200 S cm -1 ) 47 , reduced graphene oxide-based electrodes (590 S cm -1 ) 48 , and pristine MXene electrode (2600 S cm -1 ). 22][51] The AD-MXene electrode designed in the square spiral pattern through continuous writing with the AD-MXene ink revealed the compatibility of AD-MXene ink for EHD printing of complex circuits (Fig. 2e).
Performance of AD-MXene as electrodes of TFTs.The good compatibility of the AD-MXene ink for EHD printing and the high electrical conductivity of printed AD-MXene lines motivated us to investigate the effectiveness of AD-MXene as electrical contacts of TFTs.Therefore, we fabricated a TFT, wherein the AD-MXene was printed as source and drain electrodes on the ZTO active material deposited on SiO 2 /Si substrate (Fig. 3a).ZTO was selected as an active layer due to its cost-effectiveness, solution processability, and potential as alternative to expensive indium-based counterparts. 52Fig. 3b shows the transfer characteristics of TFTs prepared with AD-MXene electrodes deposited at different numbers of EHD printing cycles.All devices showed typical n-type transfer characteristics during ± 40 V of gate voltage (V G ) sweep (source to drain voltage (V D ) = 40 V), and the increased number of AD-MXene electrode printing cycles enhanced the transfer performance of TFTs due to the improvement in electrical conductivity through the formation of denser network of AD-MXene electrode (Fig. 3b).The eld-effect mobility (µ FET ) values were determined from I D 1/2 vs. V G plots by following the equation: 2 , where I D , C i , W, L, and V th are drain current, areal capacitance, channel width, channel length, and threshold voltage, respectively.Clearly, the µ FET of devices gradually increased with an increase in the number of AD-MXene printing cycles or the thickness of MXene electrodes (Fig. 3c).For comparison, TFTs with vacuum-deposited Au and Al electrodes were also fabricated and their performances were compared with that of AD-MXene devices (Fig. 3d-f).Figure 3e compares the transfer characteristics of ZTO-based TFT devices prepared with different source/drain electrodes (AD-MXene, Au, and Al).The ZTO TFT fabricated with AD-MXene source/drain electrodes exhibited better transfer characteristics than those fabricated with vacuum-deposited Al and Au electrodes.Hysteresis (the variation in OFF-to-ON sweeping transfer curve as compared to the ON-to-OFF transfer curve) was not observed for devices comprising Al and AD-MXene as source/drain electrodes, while the devices with Au as source/drain electrodes exhibited poor electrical performance with hysteresis (Fig. 3e).Remarkably, the AD-MXene based TFT yielded considerably higher µ FET of 3.24 cm 2 V − 1 s − 1 than those based on Al (2.61 cm 2 V − 1 s − 1 ) and Au (1.75 cm 2 V − 1 s − 1 ) electrodes (Fig. 3f).Contact resistances of TFTs with different electrodes were extracted by transfer length method, from the width-normalized total resistance (R tot W) of TFTs as a function of channel length shown in Supplementary Fig. 5.Although the R tot W showed a linear relationship with the channel length for all TFTs, AD-MXene electrodes caused low resistance as compared to Au and Al electrodes.Therefore, given the fact that the crystalline morphology underneath the ZTO semiconductor layer was the same for all electrodes, the observed differences in µ FET values of devices must have originated due to the changes in contact resistances at the interface of channel and electrode.In other words, we infer that the solution-processed AD-MXene electrodes provided an excellent interface with the ZTO active layer that was deposited through the same solution route, when compared to vacuum-deposited Au and Al electrodes.Performance of TFTs with different dielectric layers.The superiority and universality of AD-MXene electrodes was further demonstrated by utilizing them as gate, source, and drain electrodes in top-gate top-contact TFTs with PVDF-HFP and FPVDF-HFP dielectrics (Fig. 4).Insulating characteristics of PVDF-HFP and FPVDF-HFP dielectrics were evaluated prior to their integration in TFTs.To this end, metalinsulator-metal (MIM) capacitors with device structures of AD-MXene/PVDF-HFP/AD-MXene and AD-MXene/FPVDF-HFP/AD-MXene were fabricated by EHD-printing and their leakage current densities were measured (Supplementary Fig. 6a, b).The observed leakage current densities of below 10 − 8 A cm − 2 at an applied electric eld strength of 4 MV cm − 1 for both devices revealed the excellent insulation properties of PVDF-HFP and FPVDF-HFP dielectrics.Furthermore, the areal capacitances of PVDF-HFP and FPVDF-HFP dielectrics at 1 kHz were measured to be 34.2 and 41.8 nF cm − 2 , respectively (Supplementary Fig. 6c).The AD-MXene was coated on ZTO active layer as source/drain electrodes, after which PVDF-HFP or FPVDF-HFP was coated to form the dielectric layer.The EHD printing of AD-MXene as a gate electrode completed the fabrication of TFT with top-gate top-contact geometry, as the illustration and OM image of devices shown in Fig. 4a.The transfer properties of TFTs with PVDF-HFP or FPVDF-HFP dielectrics were obtained in the saturation regime with V G sweep (± 5 V) under V D of 5 V.In contrast to a counter-clock wise hysteresis displayed by the TFT with PVDF-HFP dielectric, no hysteresis was observed for the TFT with FPVDF-HFP dielectric.PVDF-based polymers, owing to their high dielectric constant (k) values and lack of functional groups that are known to trap charges, are usually employed as dielectrics to fabricate low-voltage-operating electrically stable TFTs. 53The ferroelectric behavior of these dielectrics (such as PVDF-HFP), which arises due to the C-F dipoles rearrangement under a strong electric eld, results in hysteresis during the operation of TFTs, as shown in Fig. 4b. 54The size of the hysteresis can be decreased by controlling the crystallinity and crystallite size of the dielectrics, precisely, by decoupling the ferroelectric domains of dielectrics. 55It was demonstrated that the ferroelectric behavior of the PVDF-HFP dielectric can be substantially decreased through adding the FPA-3F cross-linker. 55,56 ccordingly, negligible hysteresis was observed during the transfer operation of TFT with FPVDF-HFP dielectric layer (Fig. 4c).The electrical parameters of both TFTs such as µ FET , V th , and ON/OFF current ratio (I ON /I OFF ) were extracted in the saturation regime of the transfer curves and summarized in Table 1.To con rm the device reliability, positive bias-stress tests were performed to the TFTs, where the V th of n-type TFTs shifts towards the positive value under the applied positive gate-source voltage (Fig. 4d, e).The transfer characteristics recorded under the continuous applied bias of 5 V revealed the good bias stability features of TFTs and ascertained the electrical robustness of both PVDF-HFP and FPVDF-HFP dielectrics.Therefore, fabrication of TFTs with AD-MXene electrodes provides insights to the future manufacturing of MXene-based electronic devices with operational and chemical stability.
The transfer characteristics of the TFT with FPVDF-HFP dielectric were further investigated after one month of storage under 60% RH at 25 ºC, as illustrated in Fig. 5a.Transfer curves (Fig. 5b), bias-stress test results (Fig. 5c, d), and measured parameters in Table 1 revealed that the exposure to relative humidity doesn't signi cantly change the electrical performance of the TFT device.In addition to preserving the bias stability feature, the device maintained µ FET , I ON /I OFF ratio, and V th values remain close to their initial values even after the exposure of 60% RH for 30 days.All these results con rmed the excellent stability of AD-MXene electrodes under humid conditions.To demonstrate the scalability of TFTs with AD-MXene electrodes, we fabricated 7-inch wafer-scale TFT array with using FPVDF-HFP dielectric.The digital photograph of the TFT array along with the OM image of an individual device is displayed in Fig. 6a.All 64 TFTs in the array exhibited stable transfer curves under V G sweep from − 5 V to 5 V. Furthermore, good output characteristics, i.e., linear/saturation switching with stepwise increase in the V G , and excellent bias stability were observed for the TFT devices in the array (Supplementary Fig. 7).
The µ FET values calculated from the transfer curves of 64 TFTs were distributed in a small range, with an average µ FET being 4.42 ± 0.18 cm 2 V − 1 s − 1 (Fig. 6b).
Integration of TFTs for the fabrication of logic circuits.To demonstrate the practical applicability of AD-MXene electrodes, a high-performance complementary inverter was fabricated with TFTs comprising AD-MXene electrodes, FPVDF-HFP dielectric, and ZTO active layer.Figure 7a shows the schematic, top-view optical image, and circuit diagram of the complementary inverter fabricated by using two TFTs (load TFT and drive TFT), wherein the load transistor's gate electrode was connected to the drain electrode, which was used as power supply voltage (V DD ).The typical voltage transfer (input-output) characteristics and corresponding inverter gains were investigated at a V DD of 5 V, as shown in Fig. 7b.Prior to the switching (or at low input voltage (V IN )), the inverter's output voltage (V OUT ) is almost equal to that of V DD .However, the high V IN enabled the sharp switching of inverter's V OUT from a high value to 0 V, and the V OUT restored to high value when V IN decreased back to low value.This voltage reversal feature of inverter can transform "1" and "0" input logic states to "0" and "1" output states, respectively.It was also observed that voltage transfer curves of inverters fabricated with FPVDF-HFP dielectric didn't present any hysteresis feature.This inverter exhibited signi cantly higher voltage gain (de ned as dV OUT /dV IN ) of 17.8.
The feasibility of prepared TFTs in constructing logic gates was further demonstrated by fabricating NAND and NOR logic gates (Fig. 7c, d).The assembling of an additional drive TFT to NOT gate in series and parallel completes the fabrication of NOR and NAND logic gates, respectively.Figure 7c shows topview optical images and circuit diagrams of NAND and NOR logic gates.The V OUT characteristics of both these logic gates were investigated at low-voltage-operation conditions (~ 3 V) against different combinations of input signals (V A and V B ) (Fig. 7d).When at least one of the drive TFTs is turned OFF by maintaining 0 V input voltage, i.e., at logic input signal combinations of (0, 0), (1, 0), and (0, 1), the V OUT of the NAND logic gate becomes "V DD ", i.e., a logic output signal "1".In other words, the V OUT of the NAND logic gate becomes "0 V" or logic state "0" if and only if both drive transistors are turned "ON" by applying V A = 3 V and V B = 3 V or the input logic signals combination (1, 1) (Fig. 7d).On the other hand, the V OUT of NOR gate, wherein the drive TFTs are connected in series, becomes a logic state "1" (V OUT = V DD ) if and only if both TFTs are turned OFF by maintaining V A = 0 V and V B = 0 V or a logic input signal combination (0, 0).Any other combination of input voltages would turn ON at least one of the TFTs, as a result, the V OUT of NOR gate becomes logic state "0" (V OUT = 0 V) (Fig. 7d).
Integration of TFTs for the fabrication of 1T1M Cell.The hysteresis observed during the operation of TFT with PVDF-HFP dielectric is identical to that of conventional ferroelectric memory transistors (Fig. 4b).
Hence, the feasibility of these TFTs for integrating memory devices was investigated.The transfer characteristics of TFT with PVDF-HFP dielectric were shifted depending on the applied constant positive and negative V G , as shown in Fig. 8a.In detail, shifting towards negative values was noted when increasing the constant positive V G (5 V, 10 V, and 20 V), while shifting towards positive values was noted when increasing the constant negative V G (-5 V, -10 V, and − 20 V).Accordingly, the absolute V th value shift towards positive and negative values increased with an increase in the constant negative and positive constant V G , respectively (Fig. 8b).Different I D values observed at V G = 0 V for constant positive and negative V G can act as ON-and OFF-states of the device, and are useful for the information programming or erasing.The ON-state current of ≈ 10 − 6 A was measured after applying a constant positive voltage of 20 V, while the off-state current of ≈ 10 − 10 A was measured after applying a constant negative voltage of − 20 V (Fig. 8c, d).The ON-state current allows the device to be programmed for information storage, while the erasing can be achieved with the OFF-state current.Further, upon increasing the erasing pulse width from 0.3 to 2s, the transfer curve shifted in the positive V G direction.
However, this tuning of pulse width didn't result in any variation corresponding to I D at V G =0 (Supplementary Fig. S8).
The prepared TFTs with PVDF-HFP and FPVDF-HFP dielectrics were used as memory TFT and control TFT, respectively, for fabricating 1T1M cells.Figure 9a shows the schematic representation along with an optical micrograph and circuit diagrams of the fabricated memory device.The gate voltage of the memory TFT can be applied depending on the signal of control TFT.The dynamic behavior of the 1T1M device was examined by implementing multiple writing and reading processes as shown in Fig. 9b.Programming/erasing and reading operations were distinctively selected by controlling bit line voltage (V BL ) signal access to memory transistor through applying word line voltages (V WL ) of 20 V and − 20 V, respectively.In detail, the control transistor was turned ON upon applying V WL of 20 V; subsequently, this action triggered the transfer of V BL signal to the gate electrode of the memory transistor.In this condition, both programming and erasing operations were accomplished by applying V BL as 20 V and − 20 V, respectively.In contrast, the reading process of the stored data was accomplished at V WL = -20 V, wherein the control transistor was turned OFF and, as a result, the I D of the memory transistor remains at the same state irrespective of the V BL .This fabricated 1T1M cell exhibited good retention and cyclic endurance properties as shown in Fig. 9c, d, respectively.The retention test was performed by monitoring the readout current as a function of time at V WL = -20 V, after adjusting the memory cell to programming or erasing state.The device maintained ON and OFF currents for 10 4 s without much degradation in performance, which speci ed its high retention capability.The cycling stability test, which was conducted by recording the currents for repeated cycles of programming and erasing processes, revealed the switching stability and reliability of the device (Fig. 9d).
The excellent conductivity and facile processability of AD-MXene lines allowed their utilization as source, drain, and gate electrodes to fabricate all-solution processed thin-lm transistors (TFTs) through EHD printing, wherein zinc-tin-oxide and PVDF-HFP or FPVDF-HFP were utilized as active and dielectric layers of TFTs, respectively.The performance of AD-MXene electrodes was higher than the vacuum-deposited Au and Al contacts.We demonstrated exceptional stability to TFTs under high humidity conditions owing to the ability of hydrophobic ADOPA ligands to restrict moisture ingress.Furthermore, the robust operation of TFTs with AD-MXene electrodes facilitated the fabrications of high-performance complementary logic circuits (complementary inverter, NAND gate, and NOR gate) and a one-transistorone-memory cell.Overall, this work offers a proof of concept that appropriately designed surface functionalized MXenes provide a pathway to environmentally stable printable MXene-based electronics (MXetronics).

Experimental Section
ADOPA-MXene ink preparation.The syntheses of ADOPA ligand, MXene, and AD-MXene were carried out by following our earlier report. 38nthesis of ADOPA ligand ADOPA ligand was synthesized by esteri cation of 3,4-dihydroxy-L-phenylalanine (DOPA) with hydrophobic 1H,1H,2H,2H-per uoro-1-hexanol.Brie y, 0.2 M toluene (100 mL) solution containing 20 mmol of DOPA (3.94 g), 22 mmol of 1H,1H,2H,2H-per uoro-1-hexanol (5.81 g), and 20 mmol of p-TsOH•H 2 O (3.80 g) was re uxed for 48 h under an Ar atmosphere using a Dean-Stark trap to azeotropically remove water.After the completion of reaction, toluene was evaporated under vacuum to get the gel-like solid residue, which was thoroughly washed with saturated NaHCO 3 and subsequently extracted with ethyl acetate.Thereafter, the obtained ethyl acetate solution was washed with brine, and dried over anhydrous MgSO 4 to remove water.The resulting residue was dissolved in a small amount of hot ethyl acetate and crystallized from petroleum ether (60-90°C) to produce ADOPA (6.56 g, 74%).Fabrication of TFTs.The TFT devices were fabricated on heavily n-doped Si wafer with 100 nm-thick thermally grown SiO 2 layer.EHD printing was used to sequentially print active layer, source/drain electrodes, dielectrics, and gate electrodes for the formation TFTs with top-gate top-contact architecture.At rst, SiO 2 /Si substrates were cleaned by immersing in boiling acetone followed by sonication in acetone and isopropyl alcohol for 30 min each, dried under nitrogen gas, and further exposed to UV-ozone for 30 min to eliminate organic residues.The ZTO precursor solution was prepared by dissolving 0.4 M zinc acetate dehydrate and tin chloride (1:1 ratio) in 2-methoxyethanol.The SiO 2 /Si substrates were patterned with the ZTO active layer using EHD printing, and then the resulting lm was annealed at 500 ℃ for 2 h to form the ZTO active layer.AD-MXene source and drain electrodes were patterned by printing AD-MXene ink via the cone-jet mode EHD printing process.The residual solvent from AD-MXene electrodes was removed through heat treatment at 120 ℃.Afterwards, either 7wt% PVDF-HFP or FPVDF-HFP (a solution with a weight concentration of 7wt% was prepared by dissolving PVDF-HFP and uorophenyl azide (FPA-3F) in dimethylacetamide at a weight ratio of 95:5.)dielectric solutions were printed in direct contact mode (electrostatic-force-assisted dispensing), wherein the DC bias, ow rate, and working distance were 0.05 kV, 0.8 µL min − 1 , and 80 µm, respectively.The deposited dielectric layers were thermally annealed at 120°C for 1 h.The lm prepared (FPVDF-HFP) was subsequently cured by exposing it to UV light at a wavelength of 256 nm in the presence of N 2 gas to solidify the dielectric layer.

Synthesis of
Finally, the EHD printing of ADOPA-MXene gate electrode completed the device fabrication.For comparison, TFTs with conventional metal electrodes were fabricated by employing the same fabrication conditions except for the replacement of AD-MXene electrodes printing step with the vacuum-deposition of Au or Al electrodes with the thickness being the same as AD-MXene electrodes (190 nm).
Characterizations.X-ray photoelectron spectroscopy measurements were performed on ULVAC-PHI XPS instrument (Japan) with Al Kα radiation (1486.6 eV).X-ray diffraction (XRD) patterns of pristine MXene and AD-MXene were acquired using a D8 diffractometer (Bruker, USA) with a Cu K α radiation source.UVvisible absorbance spectra were recorded on a V-670 instrument (Jasco, Japan).The AD-MXene akes morphology and their arrangement in printed AD-MXene electrode was examined using eld emission scanning electron microscope (JEOL, JSM-7610F), while the morphologies of printed AD-MXene electrodes and devices were studied using optical microscope (Nikon ECLIPSE LV100ND).The dielectric performance was evaluated using an LCR meter and a Keithley 4200 SCS.The electrical characteristics of the TFTs and integrated devices (logic gates and 1T1M cells) were measured under vacuum (~ 10 − 3 Torr) using a Keithley 4200 SCS unit.

Declarations Figures
Ti 3 C 2 T x MXene: The selective removal of Al layers from the Ti 3 AlC 2 MAX precursor using the modi ed minimally intensive layer delamination (MILD) method facilitated the exfoliation of Ti 3 C 2 T x MXene nanosheets.Brie y, 3 g of Ti 3 AlC 2 MAX powder was stirred in 60 mL of 9 M HCl aqueous solution comprising 4.8 g of LiF for 24 h at 35°C.The crude product obtained was washed several times via centrifugation (3500 rpm for 5 min) until the pH of the supernatant reaches to ~ 6.Finally, delaminated Ti 3 C 2 T x nanosheets were obtained by collecting the supernatant solution from the Ti 3 C 2 T x dispersions subjected to centrifugation at 3500 rpm for 30 min.Preparation of AD-MXene inkAD-MXene was synthesized by adding 35 mL of the as-prepared aqueous MXene dispersions (1 mg mL − 1 ) into 10 mL of ethanol solution containing 3.5 mg of ADOPA under continuous stirring at room temperature.After a brief reaction time, the solvent was exchanged with ethanol via centrifugation (10,000 rpm x 3 times) to obtain the AD-MXene dispersions in ethanol.The AD-MXene dispersions in ethanol was diluted to 5 mg mL − 1 for further use.

Figure 3 Transfer
Figure 3

Figure 4 Transfer
Figure 4

Figure 7 Output
Figure 7

Table 1
Electrical parameters of TFTs with PVDF-HFP and FPVDF-HFP dielectric layers *Electrical parameters of TFTs with FPVDF-HFP dielectric after the 60% RH exposure at 25 ℃ for 30 days.