High-yield, wafer-scale fabrication of ultralow-loss, dispersion-engineered silicon nitride photonic circuits

Low-loss photonic integrated circuits and microresonators have enabled a wide range of applications, such as narrow-linewidth lasers and chip-scale frequency combs. To translate these into a widespread technology, attaining ultralow optical losses with established foundry manufacturing is critical. Recent advances in integrated Si3N4 photonics have shown that ultralow-loss, dispersion-engineered microresonators with quality factors Q > 10 × 106 can be attained at die-level throughput. Yet, current fabrication techniques do not have sufficiently high yield and performance for existing and emerging applications, such as integrated travelling-wave parametric amplifiers that require meter-long photonic circuits. Here we demonstrate a fabrication technology that meets all requirements on wafer-level yield, performance and length scale. Photonic microresonators with a mean Q factor exceeding 30 × 106, corresponding to 1.0 dB m−1 optical loss, are obtained over full 4-inch wafers, as determined from a statistical analysis of tens of thousands of optical resonances, and confirmed via cavity ringdown with 19 ns photon storage time. The process operates over large areas with high yield, enabling 1-meter-long spiral waveguides with 2.4 dB m−1 loss in dies of only 5 × 5 mm2 size. Using a response measurement self-calibrated via the Kerr nonlinearity, we reveal that the intrinsic absorption-limited Q factor of our Si3N4 microresonators can exceed 2 × 108. This absorption loss is sufficiently low such that the Kerr nonlinearity dominates the microresonator’s response even in the audio frequency band. Transferring this Si3N4 technology to commercial foundries can significantly improve the performance and capabilities of integrated photonics.


Supplementary Note 3. Statistical process analysis of multiple wafers
Wafer-scale distribution of resonance linewidths on a 10-GHz-FSR wafer: In the main manuscript, Fig.  2(b) shows the wafer map of 40-GHz-FSR chips' Qs in each stepper exposure field. Here we show that a high Q is also obtained reproducibly over the full 4-inch wafer scale, with 10-GHz-FSR chips. Supplementary Figure 3(c) shows our mask layout constituting 4 × 4 chip designs on the DUV stepper reticle. Each chip contains only a single 10-GHz-FSR microresonator. Supplementary Figure 3(a) shows that the DUV stepper uniformly exposes the reticle pattern over the full 4-inch wafer scale in discrete fields. The calibration chips studied here are the C15 chips. The most probable values of κ 0 /2π histograms of these C15 chips are measured and plotted in each exposure field, as shown in Supplementary Fig. 3(b). In most fields, κ 0 /2π ≤ 9.5 MHz is found. The reticle design contains sixteen chips and is uniformly exposed in discrete fields on the wafer. NA: not applicable, due to visible photoresist coating defects or the design missing in particular fields close to the wafer edge.
Statistical analysis of process reproducibility: Using the same chip characterization and analysis methods, multiple wafers fabricated using the same process but at different times in our university cleanroom have been measured, as listed in Supplementary Table I. The intrinsic Q 0 is summarized from multiple chips' histograms. Quality factors of Q 0 > 10 × 10 6 have been achieved in all fabricated wafers. Some wafers have been used in our published works. We note that Supplementary Table I only lists the wafers whose fabrication runs were smooth and had no error reported during the processing. Operation of our process in a foundry could significantly enhance the stability, reproducibility and even the performance of our wafer fabrication. Supplementary Note 4. 40 GHz single soliton generation without EDFA Using the Si 3 N 4 microresonators featuring Q 0 = 30 × 10 6 and anomalous group-velocity dispersion (GVD), here we demonstrate soliton microcomb generation at 40.6 GHz repetition rate, with only 10.2 mW optical power on chip (16 mW input power in the fiber), without using an erbium-doped fiber amplifier (EDFA).

Supplementary
The microresonator transmission trace from 1500 nm to 1630 nm is obtained using the frequency-comb-assisted diode laser spectroscopy 7 with one external-cavity diode lasers (ECDL, Santec TSL-510) that can scan the laser wavelength continuously (i.e. mode-hop-free) 8 . The precise frequency of each data point is calibrated using a commercial femtosecond optical frequency comb with 250 MHz repetition rate. For the TE 00 mode family, the FSR of the microresonator and the anomalous GVD are extracted from the calibrated transmission trace by identifying the precise frequency of each resonance. The total (loaded) linewidth κ/2π = (κ 0 + κ ex )/2π, the intrinsic linewidth (intrinsic loss) κ 0 /2π and the coupling strength κ ex /2π are extracted from each resonance fit 9,10 . Supplementary Figure 4(a) shows the measured linewidth of each TE 00 resonance in a critically coupled microresonator. Supplementary Figure 4(b) shows the measured microresonator integrated dispersion D int /2π. The FSR is D 1 /2π = 40.6 GHz, and the GVD is D 2 /2π = 224 kHz, obtained from fitting the measured GVD profile. Different comb states, including the modulation-instability (MI) comb, multi-soliton, perfect soliton crystal (PSC), and the single soliton, are generated in the same device. Using only a diode laser without an EDFA, the single soliton state is accessed with 10.2 mW power on the chip (input pump powers of P in = 16.0 mW), as shown in Supplementary  Fig. 4(c). The single soliton state is accessed via only laser piezo frequency tuning 11,12 , and does not require complex soliton tuning methods.

Supplementary Note 5. Broadband linewidth measurement
The wavelength range of measured resonances can be extended using the frequency-comb-assisted cascaded diode laser spectroscopy 8 with three ECDLs covering different wavelength ranges (1260-1360 nm, 1355-1505 nm, and 1500-1630 nm). Supplementary Figure 5

Supplementary Note 6. Reflow's impact on loss
In the photonic Damascene process, after dry etching, the patterned SiO 2 preform is thermal-annealed at 1250 • C over its glass transition temperature. This allows to reflow the thermal wet SiO 2 13 , in order to reduce the surface roughness introduced by the dry etching. The reflow step is performed in a standard silicon carbide atmosphericpressure CVD tube. Two-times improvement in the microresonator Q factors has been reported in Ref. 13 , which has been attributed to this preform reflow technique, however with a deformation of the waveguide cross-section as a trade-off. Here the impact of preform reflow on Q factors is studied in our high-Q microresonator fabricated with the optimized Damascene process.
Supplementary Figure 6 compares the κ 0 /2π histograms of the TE 00 mode, for 1500 nm waveguide width, with and without the preform reflow. The reflow was implemented at 1250 • C for 24 h, same as reported in Ref. 13 . Without the reflow, the most probable κ 0 /2π = 15.5 MHz is only marginally larger than the value with the reflow (κ 0 /2π = 14.5 MHz). We attribute this to the improved lithography and dry etching in the current fabrication process, which have resulted in better waveguide sidewall quality and reduced roughness. Therefore the efficacy of reflow is reduced in high-Q microresonators, and might not be necessary. Despite the fact that the reflow can increase Q, it also deforms the waveguide cross-section, leading to a slanted sidewall from 90 • to 98 • angle as shown in Ref. 13 . This deformation causes difficulties in the control of critical dimensions. However, by reducing the reflow time to only 3 hours, the sidewall slant effect can be significantly reduced. In the main manuscript, Fig. 1(b) has shown nearly maintained sidewall angles with 3 h reflow instead of 24 h. All the 40-and 10-GHz-FSR high-Q chips shown in this work were fabricated with 3 h reflow time.

Supplementary Note 7. Etchback planarization
The etchback planarization process consists of dry etching and chemical-mechanical polishing (CMP). Supplementary Figure 7(a, b) shows the process flow and the SEM images of each step. After LPCVD Si 3 N 4 deposition, continuous Si 3 N 4 films are coated on the wafer's frontside and backside. The wafer is then coated with common photoresist (PR) on the frontside. Depending on the PR viscosity, the spin-coating speed and the waveguide width, a proper PR thickness is needed for sufficient coating conformality. In our case, 600 nm PR is coated on the wafer, followed by PR reflow, to achieve a flat wafer top surface. Then a dry etching with an etch selectivity of Si 3 N 4 : PR : SiO 2 =1 : 1 : 1 is performed, to uniformly remove the excess Si 3 N 4 together with the PR. In the recipe, adding O 2 increases the PR etch rate without affecting the Si 3 N 4 etch rate. Therefore, the etch rates of Si 3 N 4 and PR can be controlled independently. Supplementary Figure 8(  Next, the wafer's backside Si 3 N 4 is removed by dry etching, to reduce the wafer bow 14 . The measured bow value of the wafer frontside using a laser interferometer is below 5 µm, indicating that the wafer is sufficiently flat. The reason to perform the frontside etchback before the backside Si 3 N 4 etch is to avoid potential crack formation during the wafer transfer and clamping in the dry etcher. The etchback process creates a wafer top surface which is flat but not smooth. A short CMP step, removing only a thin layer of materials (less than 50 nm), is already sufficient to reduce the surface roughness to sub-nanometer levels (measured using an atomic force microscopy as shown in Ref. 13 ). All the excess Si 3 N 4 has been removed during the etchback and backside etch, resulting in a small wafer bow below 5 µm. Therefore, the CMP's polishing rate and uniformity can be easily calibrated. This final CMP step serves as a fine control of the waveguide height. Supplementary Figure 7(c) shows the measured Si 3 N 4 waveguide height in different places on a full 4-inch wafer, using a reflectometer (Nanospec M6100). The measured waveguide height map shows ± 30 nm variation, corresponding to ±3% of 950 nm waveguide height, a value comparable to typical LPCVD Si 3 N 4 deposition uniformity. We note that our current height uniformity is limited by both the CMP and the etchback (dry etching). The height variation in the radial direction (i.e. center is thinner, edge is thicker) is caused by the CMP / photoresist coating (as a result of the edge effect). The height variation showing that the right-bottom is thicker is caused by the etchback, as the wafer chuck of our dry etcher has a non-uniform temperature distribution which introduces an etch-rate variation over the 4-inch wafer scale. To further improve the height uniformity, it is preferred to use larger wafers (as the edge effect is effectively weaker), and a dry etcher with a wafer chuck of a uniform temperature distribution.
Supplementary Figure 8(b) compares the photographs of two wafers, one prepared with only the CMP and the other with combined etchback and CMP. The visible color patterns are due to natural light interference, caused by the SiO 2 thickness variations on the wafer. It is clear that the combination of etchback and CMP gives better thickness uniformity over the wafer scale. This process enables full control of polishing depth, sub-nanometer surface roughness (see Ref. 13 ), and wafer-scale uniformity of Si 3 N 4 waveguide height with 3% variation. Based on this process, monolithic or heterogeneous integration of piezoelectric aluminium nitride actuators (Ref. 6,15 ), electro-optic lithium niobate modulators (Ref. 16 ) and metallic heaters (Ref. 17 ) has been demonstrated.
Furthermore, to verify the wafer-scale planarization uniformity, we measure the microresonator GVD parameter (D 2 /2π) of each 40-GHz-FSR samples (C7), as shown in Supplementary Fig. 9. Note that the wafer-scale uniformity of the most probable value κ 0 /2π of the C7 chips has been already shown in Fig. 3(b) in the main manuscript. In Supplementary Fig. 9(a), the minimum and maximum values of D 2 /2π in the center 9 fields (F1 -F9)

Supplementary Note 8. Stress release with filler patterns
We have not observed any cracks in more than 30 wafers fabricated using the current process. The stress-release filler patterns extending to the wafer edge significantly prevent crack formation starting from the wafer edge. The design criteria of stress-release filler patterns are: • The filler pattern should contain the same structure and density in the horizontal and vertical directions. As shown in Ref. 18 , if only horizontal bars are used, cracks are likely to form in the vertical direction. The horizontal bars, which create film discontinuity of LPCVD Si 3 N 4 in the vertical direction, relax the film stress in the vertical direction. Therefore, only cracks in the vertical direction are generated as a result of accumulated horizontal stress.
• The filler pattern should have sufficient density, such that the film stress does not accumulated over a larger area of continuous film. Ideally, the higher the density is, the better the stress release is. In our case, the choice of a moderate density of filler patterns is to account not only the stress release but also the dry etching and CMP uniformity.
• The filler pattern used in our current process consists of horizontal and vertical bars, forming "#" structures. The bar is a 2 × 20 µm 2 rectangle. The choice of 2 µm width is to match the typical width of the main functional waveguides (i.e. bus waveguides and microrings) which are between 1.5 µm to 2.5 µm; The choice of 20 µm length is to match the pattern density of the main functional waveguides with an exclusion zoom. It should also be mentioned that, the bar width should not be much smaller than 2h, where h is the thickness of the deposited Si 3 N 4 film (in our case, h is around 1000 nm). The reason is that, the LPCVD Si 3 N 4 growth on the substrate is conformal 18,19 , i.e. the film grows not only from the bottom of the etched trench but also from the sidewall. Therefore, if the bar width is much smaller than 2h, the conformal deposition of LPCVD Si 3 N 4 can completely fill the filler pattern trenches and form a continuous film, resulting in continuously accumulated stress that can cause cracks. The overall filling ratio of the current "#" filler patterns is approximately 24% in our design.
• There is no filler pattern applied in the coverage area of meter-long spiral waveguides. However, still no cracks are formed due to the fact that the filling ratio of the functional waveguides in this design is approximately 34%, sufficiently high for crack prevention. Therefore, the design of stress-release filler patterns is highly flexible: In the design of sparse functional waveguides, filler patterns can be placed in the available open area; In the design of dense functional waveguides that already provide sufficient spatial topography for stress release, no filler pattern is needed.

Supplementary Note 9. Waveguide layout designs
Supplementary Figure 10 shows the GDS design layouts of microring resonators of 10, 40, and 100 GHz FSRs, on 5 × 5 mm 2 chips. The microresonator is coupled to a bus waveguide whose waveguide width is identical to the microresonator's waveguide width, to achieve high coupling ideality 20 . For FSRs below 40 GHz, the rings are densely packed on the chip and the space is fully used. Thus the maximum number N of the microresonators on the wafer is approximately calculated as N ≈ A 0 /A r , where A 0 is the wafer area (for the 4-inch wafer, A 0 ≈ 63 cm 2 , calculated with an effective radius of 4.5 cm) and A r is the area of the microresonator for a given FSR.
For FSRs above 100 GHz, the space is currently not fully used on the 5 × 5 mm 2 chip. In principle, the design density can be significantly increased by making the chip smaller (e.g. 2 × 2 mm 2 ). The 5 × 5 mm 2 chip size chosen here is to facilitate the manual handling of chips with tweezers, not to increase the pattern density. For meter-long spirals, the design density is shown in the Fig. 4 in the main manuscript. In the currently case, the separation distance between waveguides is 4 µm. The minimum distance depends on the mode coupling between adjacent waveguides. Based on our experiments and eigenmode simulations, the minimum distance can be further reduced to less than 2.5 µm.

Supplementary Note 10. Comparison of silicon nitride fabrication processes
Supplementary Table II compares

Supplementary Note 11. Derivation of response relation
In the linear regime, the frequency response dν m to the modulated pump power dn c (in the microresonator) at modulation frequency ω/2π is given by In the DC modulation regime (ω → 0), the Kerr response term χ Kerr (0) is calculated 21 as where we use dν m ,Kerr /ν m = 2n 2 dI/n eff . c is the speed of light, h is the Planck constant, n g = 2.1 is the group index, n eff = 1.8 is the effective refractive index, V eff is the effective optical mode volume, n 2 = 2.4 × 10 −19 m 2 /W is the nonlinear index of Si 3 N 4 . The factor of 2 comes from the cross-phase-modulation, as the pump and probe modes are two distinct resonances in our experiment (i.e. m = m and ν m = ν m ). The thermal response term χ therm (0) is calculated as where we use dν m ,therm /ν m = dn mat /n mat and dP abs = κ abs hν m dn c . The material refractive index of Si 3 N 4 at 1550 nm is n mat = 2.0, and its thermo-optic coefficient 22 is dn mat /dT = 2.5 × 10 −5 /K.

Supplementary Note 12. Fitting of the measured response
For the microresonator response data presented in Fig. 5 in the main manuscript, we use the fitting function below χ therm (0) ) 1 1+2iω/κ probe 1 1+2iω/κpump (4) to extract the response ratio γ = χ therm (0) χKerr(0) from the response measurement. Here the free fitting parameters are only κ pump , the ratio γ, and an arbitrary constant pre-factor. The normalized thermal response χ therm (ω) χ therm (0) is retrieved from the frequency domain heat transfer COMSOL simulations, and κ probe is measured and kept the same for all measurements performed on the same microresonator. Importantly, only the data above 10 kHz is used in the fitting due to the locking distortion at lower frequencies. The validity of the dynamical heating simulations, and hence that of the simulated response function, is verified by benchmarking the model with our recent thermorefractive noise measurement 23 of similar Si 3 N 4 samples, where the measured noise spectrum is connected to the real part of our response function through the Fluctuation-Dissipation Theorem (FDT) in the frequency range that we are interested in.
We notice that the fitting function (which we refer to as "analogue" fitting) where the "analogue" function 1 1+(ω/ω th ) ζ with free parameters, thermal cutoff frequency ω th and pole number ζ, replaces the simulated thermal response function χ therm (ω) χ therm (0) , could in principle fit the curve better to the measured response data. However, we observed that using this model, the fitting tends to systematically overestimate the response ratio γ for high absorption resonances as illustrated in Supplementary Fig. 11. This fitting artifact is manifested in the absorption rate calibration as shown in Supplementary Fig. 11(c), where for resonances with higher than 10 MHz absorption rate, the method starts to overestimate the absorption rate, yielding absorption rates that are larger than the actual, i.e. physically observed, absorption rates. This overestimate occurs due to the complicated thermal One could easily see that the analogue fitting result does not correctly capture the thermal response of the device, and therefore tends to overestimate the response ratio γ for high absorption resonances leading to unphysically high intrinsic absorption that exceeds the measured cavity loss rate. This feature of the analogue fitting is reflected in the absorption rate calibration, as is shown in Panel (c), that for resonances with absorption rate higher than 10MHz the analogue fitting method starts to overestimate the absorption rate.  Probe λ=1541 nm γ=17.5 Probe λ=1559 nm γ=9.4 Probe λ=1586 nm γ=8.3 Probe λ=1618 nm γ=7.2 Probe λ=1532 nm γ=1.2 Probe λ=1538 nm γ=1.0 Probe λ=1553 nm γ=0.7 Probe λ=1571 nm γ=0.4 Probe λ=1595 nm γ=0.9 Probe λ=1604 nm γ=0.8 Supplementary Figure 14: More resonance response data fittings similar to those shown in Fig. 5(c, e) in the main manuscript. Panels (a -f) correspond to data shown in Fig. 5(c) in the main manuscript. Panels (g -l) correspond to 40-GHz-FSR data shown in Fig. 5(e) in the main manuscript.