Si0.97Ge0.03 microelectronic thermoelectric generators with high power and voltage densities

Microelectronic thermoelectric generators are one potential solution to energizing energy autonomous electronics, such as internet-of-things sensors, that must carry their own power source. However, thermoelectric generators with the mm2 footprint area necessary for on-chip integration made from high thermoelectric figure-of-merit materials have been unable to produce the voltage and power levels required to run Si electronics using common temperature differences. We present microelectronic thermoelectric generators using Si0.97Ge0.03, made by standard Si processing, with high voltage and power generation densities that are comparable to or better than generators using high figure-of-merit materials. These Si-based thermoelectric generators have <1 mm2 areas and can energize off-the-shelf sensor integrated circuits using temperature differences ≤25 K near room temperature. These generators can be directly integrated with Si circuits and scaled up in area to generate voltages and powers competitive with existing thermoelectric technologies, but in what should be a far more cost-effective manner.

Extremely interesting paper on Silicon related thermoelectricity that abounds in the architecture presented previously by the authoring group. The authors report small area TEGs (< 1mm2) using standard Si IC processing. Low dimensional Si in the shape of blades are used as thermoelectric material. Despite poor thermoelectric performance in terms of usual figure of merit, ZT, the authors show that for an operational point of view comparable power densities can be obtained to those of conventional, hard to miniaturize, modules and that the obtained power densities are good enough to power IoT devices even at ΔTs of 15-25 K. The ability of integrating a very large number of thermocouples with good control of parasitic (thermal and electric) resistances overcome their poor individual performance.
The volume of involved devices and analysed data leads to a nice corpus of experimental evidence that sustain the main conclusions of the work.
As commented earlier, the basic device structure and associated technological workflow has been already introduced in a previous paper. Two are the main novelties of the present manuscript. One is that their nanoblade-shaped active material is now SiGe instead of Si, with a max 3% of Ge content introduced by ion implantation. The other is the extension of device characterization to harvesting scenarios by directly heating the devices with an external source rather than using a built-in heater as in the previous paper.
Some constructive criticisms follow: Ge content and SiGe material/TEGs: SiGe alloys are considered by the authors because a lower thermal conductivity is expected for them. Earlier evidence (not referenced) pointed to significant thermal effects when %Ge was in the 20-80% range. A literature value is showcased in the text for a 40% Ge. However, the authors are using a much lower Ge content. The apparent efficacy of such lower content is worth a comment. The included references deal mostly with SiGe bulk or nanostructured bulk values, but no references are given for SiGe material in nanowire form, either experimental or theoretical, nor are recent papers on SiGe NWs TEGs considered for completing the picture. Have the different Ge contents been measured/analized by any physical characterization mean or are they estimations coming from implantation simulations? First order out-of-envelope calculations from the reported Ge implantation doses seem to be insufficient for a homogeneous 3% Ge content in the upper 0.5 micron of the implanted silicon. Post-anneal Ge concentration estimated curves could be a useful addition to the supplementary material to clarify this point.
Test devices and harvest devices: 'Test devices' are said to be designed for power density and 'harvest devices' for voltage density. However, at a first glimpse of Fig 1 and Fig 2, power obtained for the former is lower than the one for the latter. Of course, the difference is the area in each case. One learns later that the test device is indeed a single thermocouple device with a minimum area while the harvest device features hundreds of them (yet in an impressive small area). My point is that this issue should be more clearly stated when introducing Fig 1 and 2, and that power densities and/or voltage densities should be used for the comparison, either graphically or through direct statements in the text, so that the differences in design reveal themselves.
The authors state that sixteen different designs have been produced for the test devices. One parameter was Ge content. 3% Ge was found to yield the best power densities within a given range. Could the authors comment on which was the optimum combination of the other design parameters that led to the maximum obtained value (30uW/cm2/K2)?
In the previous paper, the authors were able to calculate/estimate the 'real' ΔT perceived by the nanoblades. Have they done so in the current experiment and have estimated if the fraction of the ΔT perceived by the nanoblades increased with Ge content?
The resistance of the test mode / power optimum device is around 5 ohms, and the one of the corresponding unit cell for the harvest mode /voltage optimum device is about 120 ohms. Do the authors know which part of it corresponds to the nanoblade arrangement and which to the rest of concurring elements (Cu lines, W plugs, Si wells/silicide)? Do the device resistance change with Ge content?
Powering IoT devices: Interestingly, the authors have powered in a lab setup some IoT related devices: a PMIC and an optical sensor. Moreover, they have succeeded to do it with moderate values for an external ΔT. How severe is, anyway, the incapacity of powering through the BQ25570 PMIC devices with RL < 0.9Mohms? What would that suppose in a realistic scenario: total impossibility of powering, need of a secondary battery, duty cycle compromises…?
It may be useful to ponder why the OPT3001 needs a 22K ΔT (2.2 V) when powered directly by the TEG and it would not work with a ΔT of 17.5K, which produces 1.8V, if that is the voltage supplied by a TEG powered BQ25570? Others: The devices are made with a commercial 65nm CMOS technology. 80 nm was chosen though as the minimum feature for the nanoblades. Is then 80nm the lowest reliable possible dimension in that technology?
In the introduction, biomedical applications (including implants) and embedded IoT sensors are mentioned as devices welcoming autonomous power other than batteries. Although (very) small footprints harvesters would indeed be welcome by such applications, they are specially challenging for TEGs from a thermal scenario point of view and effective ΔT capture. Do the authors believe that those applications are really the lowest hanging fruit for the thermoelectric generators they are after?
Harvesting characterization is the characterization mode that more closely resembles operational conditions. Moving from test mode (built-in heater) into harvesting mode using an external hot object as a heat source is a step forward. However, the cold side operation is still a bit unrealistic since in practice the whole probe station is used as heat exchanger to the ambient at that end, probably pinning down Tc to a much lower value that would be developed by itself. Have the authors tried to heat the device with a hotplate/thermal chuck and attach a regular size heat exchanger to the Al pad?

Typos/errors:
In line 109, it is wrongly said that a given commercial TEG (ref 22) produces 2.71 W for Th = 110 ºC and Tc = 50 ºC. The power delivered in those conditions is 0.41 W according to the datasheet, as correctly pointed out in line 169 References 35 and 36 has gone misplaced after the supplementary information.
In the supplementary information previous authors work is wrongly referenced as 22 instead of 23.

Luis Fonseca
In the following, the Reviewers' verbatim comments are quoted in black italic font. The authors' response is in blue font.

Response to Reviewer #1:
This is a sequel to the authors' previous work of Ref.23 and 25. The novelties of this work are the inclusion of Ge into Si thermoelements and the demonstration operation of their micro-TEG device by an external heat source to drive off-the-shelf power management IC and light sensor. I can support the authors' approach to optimize the power density at given temperature difference, rather than focusing on thermodynamic efficiency. This paper will attract interest of scientists in the areas of thermoelectric energy harvesting.
It is a notable result that the specific power density was improved significantly by doping small amount of Ge up to 3 % in Si blade. However, it is to be regretted that there is no discussion on the scientific reasoning. I think there is no reason not to show the dependence of Seebeck coefficient on the Ge concentration. I expect that the authors provided test element group devices to measure the resistivity and carrier concentration of SiGe blades. These data are essential to deepen understanding of the effect of Ge doping. Lines 95-102 ("Si1-xGex was used because … using only a few % Ge.") of the revised manuscript expand the explanation of the scientific reasoning for why only a few % Ge in Si improves TEG performance significantly. The basic explanation is that the thermal conductivity k for Si1-xGex decreases with increasing x very strongly in the narrow range from x = 0 to x = 0.05, where the thermopower and resistivity change very little with x. This causes a strong increase in TE figureof-merit and hence performance. References 25, 30-33 have been added to support this explanation. See also our response to Reviewer #3's first comment.
The revised Fig. 1d adds the dependence of the measured Seebeck coefficient on the Ge concentration in otherwise identically structured TEG devices.
I am interested in the statement in line 52, "It has proven difficult to microfabricate high ZT materials…" The authors might want to mension the reason for this statement, or show supporting references. Lines 56-58 ("Small area … and moderate ∆T ~ 20 K") of the revised manuscript re-write this statement to clarify our meaning. We now state the fact that high ZT TEGs having areas < few mm 2 have been unable to reach necessary voltage and current generation thresholds. References 4, 6, and 7 have been cited to substantiate this statement. In particular, Ref. 7 includes a detailed Table showing that TEGs with areas << 1 cm 2 have not yet been able to exceed 1 V with µW of power operating from ∆T » 20 K.

Response to Reviewer #2:
The design, fabrication, and analysis of performance keypoints is innovative, under my point of view. All these things are meaningful and very different from the classical TE-devices.
The manuscript is a follow-up work from the same group which was published in Nature Electronics (doi.org/10.1038/s41928-019-0271-9) last year. Here, they use Si0.97Ge0.03 to enhance the material's TE performance and also optimize the µTEG's power performance by device physics and circuit engineering principles. Besides, they show the demonstrations of energizing integrated circuits by the µTEGs. The article is well organized, and I only have a few suggestions for improvements.

1.
I suggest the power-generating performance of µTEGs under higher ∆T should be shown, especially for the harvest mode one, because higher ∆Ts are used in the demonstrations. Fig. 3 has been replaced with new data showing harvest mode µTEG performance up to ∆T = 23.2 K, which is in the range of ∆Ts used in the device demonstrations shown in Fig. 4.

2.
For me the explanation of the thermal circuit is confusing. Especially reading the description of fig 2 c, where it is said that the heat flow is in the plane of the paper. It would seem that it is both thermally and electrically in series (maybe there is more information in the supporting information). A visual indication of the heat flow in the images would be helpful. We think Reviewer 2 misread the caption of Fig. 2c in the original manuscript; the caption stated that "Heat flows into (emphasis added) the plane of the page as shown." To minimize potential for confusion, Fig. 2c in the revised version now adds an "into the page" vector symbol marked as "Heat flow Q into page", and its caption has been re-written to describe the relative directions of heat flow and electrical current.

3.
For the powering of low-power electronic devices an output potential of least 50 mV is required. The authors should at least present a concept how to achieve higher output potential with their microdevice. We do not understand why Reviewer 2 wrote this comment. In the section around Fig. 4 in the original manuscript (retained in the revised manuscript), we clearly show that our harvest mode µTEGs can deliver an output potential of ≥ 1.8 V with sufficient current to successfully power two examples of commercial low-power electronic devices. This is a central result of this paper.

Response to Reviewer #3:
Extremely interesting paper on Silicon related thermoelectricity that abounds in the architecture presented previously by the authoring group. The authors report small area TEGs (< 1mm2) using standard Si IC processing. Low dimensional Si in the shape of blades are used as thermoelectric material. Despite poor thermoelectric performance in terms of usual figure of merit, ZT, the authors show that for an operational point of view comparable power densities can be obtained to those of conventional, hard to miniaturize, modules and that the obtained power densities are good enough to power IoT devices even at ΔTs of 15-25 K. The ability of integrating a very large number of thermocouples with good control of parasitic (thermal and electric) resistances overcome their poor individual performance.
The volume of involved devices and analysed data leads to a nice corpus of experimental evidence that sustain the main conclusions of the work.

As commented earlier, the basic device structure and associated technological workflow has been already introduced in a previous paper. Two are the main novelties of the present manuscript. One is that their nanoblade-shaped active material is now SiGe instead of Si, with a max 3% of Ge content introduced by ion implantation. The other is the extension of device characterization to harvesting scenarios by directly heating the devices with an external source rather than using a built-in heater as in the previous paper.
Some constructive criticisms follow: Ge content and SiGe material/TEGs: SiGe alloys are considered by the authors because a lower thermal conductivity is expected for them. Earlier evidence (not referenced) pointed to significant thermal effects when %Ge was in the 20-80% range. A literature value is showcased in the text for a 40% Ge. However, the authors are using a much lower Ge content. The apparent efficacy of such lower content is worth a comment. The included references deal mostly with SiGe bulk or nanostructured bulk values, but no references are given for SiGe material in nanowire form, either experimental or theoretical, nor are recent papers on SiGe NWs TEGs considered for completing the picture. As in our response to Reviewer #1's similar comment, Lines 95-102 ("Si1-xGex was used because … using only a few % Ge.") of the revised manuscript expand the explanation of the reasoning for why only a few % Ge in Si improves TEG performance significantly. The basic explanation is that the thermal conductivity k for Si1-xGex decreases with increasing x very strongly in the narrow range from x = 0 to x = 0.05, where the thermopower and resistivity change very little with x. This causes a strong increase in TE figure-of-merit and hence performance. References 25, 30-33 have been added to support this explanation. The graph below, cited in the revised manuscript as Ref.
30, makes this point: (from M. Wagner, Simulation of Thermoelectric Devices. Ph.D. Dissertation, Tech. Univ. Wien, Nov. 2007) The revised manuscript adds References 25,27-29, and 33 on recent SiGe nanowire TEG work. We thank Reviewer #3 for pointing out to us numerous such references.

Have the different Ge contents been measured/analized by any physical characterization mean or are they estimations coming from implantation simulations? First order out-of-envelope calculations from the reported Ge implantation doses seem to be insufficient for a homogeneous 3% Ge content in the upper 0.5 micron of the implanted silicon. Post-anneal Ge concentration estimated curves could be a useful addition to the supplementary material to clarify this point.
The Ge contents have been estimated by implantation simulations. We re-did implant simulations using two simulation tools: TRIM and TCAD. Reviewer #3 is correct in estimating that the implant parameters given in the original manuscript are insufficient for a homogeneous 3% Ge content in the upper 0.5 micron of silicon -this was based on an inaccurate previously existing simulation. A typographical error in the original manuscript, which listed the Ge ion dose at 270 keV as 1.6 ´ 10 16 cm -2 , has been corrected. The correct dose used was 2.4 ´ 10 16 cm -2 .

Test devices and harvest devices:
'Test devices' are said to be designed for power density and 'harvest devices' for voltage density. However, at a first glimpse of Fig 1 and Fig 2, power obtained for the former is lower than the one for the latter. Of course, the difference is the area in each case. One learns later that the test device is indeed a single thermocouple device with a minimum area while the harvest device features hundreds of them (yet in an impressive small area). My point is that this issue should be more clearly stated when introducing Fig 1 and 2, and that power densities and/or voltage densities should be used for the comparison, either graphically or through direct statements in the text, so that the differences in design reveal themselves. Lines 75-87 ("Each test mode … voltage density rather than power.") of the revised manuscript have been re-written to explicitly and clearly describe the different functions of "test" and "harvest" mode devices right at the beginning of the Results section. In particular, we now state up front that the test mode devices were designed to optimize power density, not voltage, while the harvest mode devices were designed to maximize voltage density, not power.
The authors state that sixteen different designs have been produced for the test devices. One parameter was Ge content. 3% Ge was found to yield the best power densities within a given range. Could the authors comment on which was the optimum combination of the other design parameters that led to the maximum obtained value (30uW/cm2/K2)? We think Reviewer #3 mis-interpreted our statement that 16 different designs were produced for the test devices. From what Reviewer #3 wrote, it appears that he/she thought that the 16 different designs included variations of Ge content x. This is not correct. For each x = 0, 0.01, 0.02, and 0.03, we tested 16 different device layouts having the same x but different structural and geometric parameters. Thus if we included x as a parameter, we tested 16 ´ 4 = 64 different test mode µTEG variants.
Lines 128-135 ("For each value of x … gave GP between 20 to 30 µWcm -2 K -2 .") of the revised manuscript have been re-written to make our explanation of this matter clearer and hopefully less open to mis-interpretation by a reader.
Lines 135-140 ("Higher GP layouts were associated … to decrease the thermopile's RS.") of the revised manuscript add some comments about what combination of design parameters maximized power generation performance.
In the previous paper, the authors were able to calculate/estimate the 'real' ΔT perceived by the nanoblades. Have they done so in the current experiment and have estimated if the fraction of the ΔT perceived by the nanoblades increased with Ge content? Lines 124-131 of the revised manuscript have been added to answer this question.
The resistance of the test mode / power optimum device is around 5 ohms, and the one of the corresponding unit cell for the harvest mode /voltage optimum device is about 120 ohms. Do the authors know which part of it corresponds to the nanoblade arrangement and which to the rest of concurring elements (Cu lines, W plugs, Si wells/silicide)? Do the device resistance change with Ge content? Lines 176-180 ("If we scale … in the test mode device.") of the revised manuscript have been added to answer this question. After scaling for the different number of TE blade elements in parallel, the harvester's scaled resistance per thermocouple is slightly higher than the test mode's scaled resistance per thermocouple. We cannot be certain where the extra resistance comes from, but we do know that the harvest mode devices have extra metallization per thermocouple in order to connect the thermocouples in series.
Line 119 of the revised manuscript adds a statement that the source resistance of a test mode device increases by ~ 10% going from x = 0 to x = 0.03.

Powering IoT devices:
Interestingly, the authors have powered in a lab setup some IoT related devices: a PMIC and an optical sensor. Moreover, they have succeeded to do it with moderate values for an external ΔT. How severe is, anyway, the incapacity of powering through the BQ25570 PMIC devices with RL < 0.9Mohms? What would that suppose in a realistic scenario: total impossibility of powering, need of a secondary battery, duty cycle compromises…? Lines 195-199 ("If this µTEG/PMIC configuration … backup battery with the PMIC.") of the revised manuscript have been added to answer this question.
It may be useful to ponder why the OPT3001 needs a 22K ΔT (2.2 V) when powered directly by the TEG and it would not work with a ΔT of 17.5K, which produces 1.8V, if that is the voltage supplied by a TEG powered BQ25570? Lines 205-209 ("This was the smallest … but at zero current.)") of the revised manuscript have been added to answer this question. In short, a ∆T near 17.5 K would generate an open-circuit voltage of 1.8 V, but at zero current. The smallest ∆T needed to generate both sufficient voltage and current was near 22 K.

Others:
The devices are made with a commercial 65nm CMOS technology. 80 nm was chosen though as the minimum feature for the nanoblades. Is then 80nm the lowest reliable possible dimension in that technology? Lines 282-283 ("An 80 nm width was used … "65 nm node" process technology.") of the revised manuscript have been added to answer this question.
In the introduction, biomedical applications (including implants) and embedded IoT sensors are mentioned as devices welcoming autonomous power other than batteries. Although (very) small footprints harvesters would indeed be welcome by such applications, they are specially challenging for TEGs from a thermal scenario point of view and effective ΔT capture. Do the authors believe that those applications are really the lowest hanging fruit for the thermoelectric generators they are after? Reviewer #3 is correct to question whether biomedical applications are "…the lowest hanging fruit…" for our µTEGs. In fact, biomedical applications constitute perhaps the most challenging application for TEGs because they generally involve small ∆Ts and difficult thermal interface conditions.
The revised manuscript removes references to possible biomedical applications in both the Abstract and the opening paragraph. Instead, Reference 2 has been added as it describes a range of "low hanging fruit" potential applications for TEGs.
Lines 234-247 ("Assuming thermal interface issues … of this harvesting mode µTEG design.") of the revised manuscript add a paragraph to comment on µTEG performance parameters needed for biomedical applications, and what it might take to achieve such performance.
Harvesting characterization is the characterization mode that more closely resembles operational conditions. Moving from test mode (built-in heater) into harvesting mode using an external hot object as a heat source is a step forward. However, the cold side operation is still a bit unrealistic since in practice the whole probe station is used as heat exchanger to the ambient at that end, probably pinning down Tc to a much lower value that would be developed by itself. Have the authors tried to heat the device with a hotplate/thermal chuck and attach a regular size heat exchanger to the Al pad? Lines 224-233 ("All our µTEG devices were designed … directing external heat into an IC chip.") of the revised manuscript add a paragraph to comment on the importance of thermal interfacing and heat exchange. We state that the devices used for this research were designed to be tested in a wafer probe station and hence were not compatible with standard heat exchangers. While we acknowledge the importance of thermal interfaces in order to use a TEG in any practical application, research on efficient heat exchangers and thermal packaging is another step beyond the scope of this paper, which focuses on device performance.
We have tried Reviewer #3's suggestion to try reversing the normal hot/cold contacts to a harvest mode µTEG, i.e., to use a thermal chuck to heat the backside of a µTEG chip and use the frontside Al thermal pad as the cold reservoir. Because these devices were made to be wafer probed, the frontside Al thermal pad could not be attached to a regular size heat exchanger -we could only use the small-diameter Cu rod, unheated, touching the Al pad to try to thermally anchor it. However, because the silicon chip area is smaller than the thermal chuck area, we found that heating the chuck resulted in a layer of heated air directly over the silicon chip. This temperature of this air layer was measured to be within 2 to 3 K of the chuck's temperature, so a maximum ∆T of < 3 K could be maintained this way. We do note that the |VOC| then measured from the harvester µTEG operated in this "reverse" manner was consistent with the |VOC| values obtained the "normal" way, i.e., using the Cu rod as heater and the chuck as room-temperature cold reservoir.

Typos/errors:
In line 109, it is wrongly said that a given commercial TEG (ref 22)  In the supplementary information previous authors work is wrongly referenced as 22 instead of 23. These errors have been corrected.