All WSe2 1T1R resistive RAM cell for future monolithic 3D embedded memory integration

3D monolithic integration of logic and memory has been the most sought after solution to surpass the Von Neumann bottleneck, for which a low-temperature processed material system becomes inevitable. Two-dimensional materials, with their excellent electrical properties and low thermal budget are potential candidates. Here, we demonstrate a low-temperature hybrid co-integration of one-transistor-one-resistor memory cell, comprising a surface functionalized 2D WSe2 p-FET, with a solution-processed WSe2 Resistive Random Access Memory. The employed plasma oxidation technique results in a low Schottky barrier height of 25 meV with a mobility of 230 cm2 V−1 s−1, leading to a 100x performance enhanced WSe2 p-FET, while the defective WSe2 Resistive Random Access Memory exhibits a switching energy of 2.6 pJ per bit. Furthermore, guided by our device-circuit modelling, we propose vertically stacked channel FETs for high-density sub-0.01 μm2 memory cells, offering a new beyond-Si solution to enable 3-D embedded memories for future computing systems.


Supplementary Note 1: Experimental determination of gate oxide capacitance for WSe2 TFT with WO3
Given that the WSe2 TFT channel area is in the order of tens of µm 2 , accurate determination of gate capacitance from the transistor is challenging. Hence we fabricated separate MOS capacitor structures as shown in Supplementary Figure 3a  We found that the experimentally measured capacitance is around 77 nF/cm 2 2x larger than the geometric gate capacitance (38 nF/cm 2 )

Supplementary Note 2: ReRAM Switching Energy Estimation
Switching energy per bit, reported in this work is calculated by integrating switching power over the pulse width.
Where Tprog is the programming voltage pulse width, Vprog(t) is the switching voltage and Iprog(t) is the switching current.
*For the references, where switching energy is not explicitly stated, we estimated the switching energy (Table at the  first order 22 by, Where Tprog is the programming voltage pulse width, Vprog is the programming voltage and I is the programming current.

Supplementary Discussion 1: Effect of metal electrode on ReRAM switching Characteristics
The DC switching cycle of Ag-Ag, Ag-CNT and CNT-CNT electrodes are shown in Figure S8. We observe similar abrupt switching, in all the three cases, irrespective of the metal contacts used. This observation further confirms that the switching mechanism is inherent to the printed WSe2 material, likely due to Se vacancies and thus ruling out the possibility of Ag ion diffusion. It should be noted that the higher set voltage observed for CNT-CNT electrode based ReRAM is attributed to the thicker switching element formed with 80 passes, as opposed to thinner WSe2 with 40 passes.

Supplementary Discussion 2: Projection of subthreshold swing with gate dielectric thickness
As the device in the manuscript is not a representative of the current state of the art devices, owing to the large operating gate voltage and large sub threshold swing (SS), we have projected sub threshold swing variation with the gate dielectric thickness (Supplementary Figure 12) using the relation, = 10 (1 + ⅈ 0 ). The large gate voltage requirement is due the 90 nm thick SiO2 gate dielectric. The relatively thicker oxide is chosen to limit the gate current and not to be a detractor in our analysis of the intrinsic channel properties such as conductivity, charge, contact barrier resistance etc of WSe2 FET after plasma oxidation. The plot shows the contribution of Dit (interface trap density) Vs. short-channel electrostatic (SCE) (E.g. source-to-drain tunneling current, source-drain charge sharing for Lg -10 nm) impact on SS. Extensive process optimization with respect to gate stack could potentially improve Dit. This is an active area of investigation, which require fundamental material-process co-innovation. To compare the projected device performance with smaller gate length, simulated subthreshold swing for 10 nm gate length device from literature is also added 2,3 .