A novel true random number generator based on a stochastic diffusive memristor

The intrinsic variability of switching behavior in memristors has been a major obstacle to their adoption as the next generation of universal memory. On the other hand, this natural stochasticity can be valuable for hardware security applications. Here we propose and demonstrate a novel true random number generator utilizing the stochastic delay time of threshold switching in a Ag:SiO2 diffusive memristor, which exhibits evident advantages in scalability, circuit complexity, and power consumption. The random bits generated by the diffusive memristor true random number generator pass all 15 NIST randomness tests without any post-processing, a first for memristive-switching true random number generators. Based on nanoparticle dynamic simulation and analytical estimates, we attribute the stochasticity in delay time to the probabilistic process by which Ag particles detach from a Ag reservoir. This work paves the way for memristors in hardware security applications for the era of the Internet of Things.

in the main text, in perfect agreement with (b) simulated results (all parameters are the same as in simulations presented in the main text and temperature ratio for blue and green histograms are 5/6). (c) The delay time is decreasing as the temperature increases with an activation energy of 0.2 eV, also consistent with that in simulations in (d). =0.6; blue:

Supplementary
=2. Note that quantum fluctuations result in the maximum of the distributions shifting to the right (we used 0 /(ℏ /2) = 6).
The probability density is normalized by� ℏ .

Supplementary Figure 8 | 3D simulations of a diffusive memristor dynamics. (a)
Conductance (red curve) normalized by its maximum value and voltage across the memristor normalized by its threshold th , potentials used in simulations are shown in the inset (see Supplementary Note 3). Simulations are done for 9 Ag-nanoparticles. (b) The histogram is fitted by the analytically derived distribution, the fitting is quite good despite the complex 3D potential. Simulations are done for 6 Ag nanoparticles. (c) The possible current paths between memristor electrodes via Ag nanoparticles (for simplicity the case of only 4 Ag nanoparticles are shown). Panels 1-6 show the Ag particles positions at the points marked by orange circles in panel a), panels 1-3 demonstrate how the 3D conducting path are forms, while panels 4-6 show the relaxation of the device to its off state. The ratio λ/L=0.2, all other parameters are the same as in 1D simulations.
Supplementary Figure 9 | Simulated three possible cases during continuous pulse switching: no switching, successful random number generation, and failure due to incomplete relaxation. The results show device conductance change (in blue) in response to three pulse cycles (in red) and corresponding evolution of Ag nanoparticle distribution. Here we used the following voltage pulse parameters: voltage pulse duration κtp=35, interpulse interval κ∆t=140 and voltage amplitude Vam/Vth=1.6; potential versus temperature as in fig. 4f. During the first pulse, the system had not enough time to be excited to the low resistive state (see main panel and subpanels 1-4), thus the random number was not generated. Note that several Ag particles are detached from the Ag-electrode and form a large cluster nearby (panel 2), it was not enough time to particles escape the cluster and unfold; and the particles are absorbed by the electrode as soon as pulse are over (panel 3). By the second shown input pulse arrival, the device is well relaxed (panel 4), when voltage gradually increases, Ag-particles first detached from the Ag-electrode and form the big cluster (panel 5), then cluster elongates and several Ag-nanoprticles starts travelling (panel 6) towards the other electrode starting positive feedback (lowering resistance results in generation more heating, higher temperature detached more particles from the Ag electrodes and push away from the big cluster, thus lowering resistance even further, panels 7). Finally, the memristors turned ON (panel 8) after some delay time. In this case, the random number is successfully generated. After the pulse is off, the device starts relaxing back to its high resistive state (first by breaking continuous conducting path panel 9, then, fragmenting into many small Ag-clusters, panel 10, which tends to be absorbed by the Ag electrode). However, since some Ag-nanoparticles are not absorbed and are still travelling between electrodes (panel 11) when the next pulse arrives and, thus, the device doesn't have enough time to settle in its high resistive state. In this case, the memristor is switched to ON state gradually with no delay time (Panels 12-18) during the voltage increase.
Moreover, the conductance can increase non-monotonically when voltage is low due to fluctuations in Ag-cluster numbers and distance between them (panels 12-14); the conductance starts to relatively fast increase when voltage is high enough to allow Agparticles to escape (panel 15) from the large cluster near Ag-electrodes, forming in the end conducting path (panel 16). In this case, failure to generate random bits occurs.
Supplementary Figure 10 | Bit frequency uniformity at different data collection scheme. (a) If each time 8-bit data is collected from the 8 lower-order bits of the counter, the block counts are not uniform. (b) If only the 6 lower-order bits are collected, each block is equally likely. The data collecting circuits uses a built-in clock in the micro-controller that has a 11.0592 MHz crystal oscillation frequency. The 8 th lowest bit flips 4 times slower than the 6 th lowest bit and hence the experiment suggests that ~ 4 times faster clock signal (> 44.2368 MHz) is required for an 8-bit counter.

Cycle
Current state in the shift registers Output Feedback . At the first step, an 8-bit sequence (00001110) is generated from our TRNG and is used to seed the LFSR. The LFSR will start working, triggered by the clock edges. All the bits in the current state will be shifted to the right and the least significant bit (in this case, "0") will be the output. At the same time, tap bits ("0", "1" and "0") will be XORed together and resulting "1" is used for feedback and input to the most significant bit. The table lists how the bits flip for the first 5 cycles of this LFSR, which will continue generating bits indefinitely. However, to ensure unpredictability, we need to re-seed the LFSR before the pattern repeats. In this example, we refresh the LFSR with a new 8-bit sequence (10110100) generated from the diffusive memristor TRNG after 16 cycles. The LFSR will then continue running based on the new initial state as shown in the table.

Re-seed techniques apply a new seed
Supplementary Figure 12 | Sketch of an Ag nanoparticle detaching from the Ag electrode. (a) The shape of the particle varies during the detaching process in order to minimize its surface energy. We describe the shape of particles in cylindrical coordinates (ρ(z), z), ρ(z=0) = ρ0 (no dependence of ρ on the angular coordinate was assumed). The total "height" z0 of the particle and its effective instantaneous radius R are shown on the sketch. (b) The free electrode surface S1 increases when particle detaching; the contact surface S2 between nanoparticle and the electrode decreases as particle departing, while the free surface of the particle itself S3 increases in this process. In the estimate below, it was assumed that the interfacial energy γ per unit area for interfaces S1 and S3 being the same, while the interfacial energy γ1 per unit area for the interface S2 can vary from 0 (clean interface) to 2γ (several SiO2 layer separating two contacting Ag surfaces). bits from the same diffusive memristor) from the very beginning cycles and the last 2 M bits from the same device that after ~ 9 × 10 6 cycles. Both of them passed the tests, indicating that even after many cycles the randomness in memristive switching remains sufficient to produce high quality random bits using our method.

Interfacial barrier
First we consider how an Ag-nanoparticle detaches from the boundary. We assume that its mass/volume does not changes during the detachment (no material exchange between the electrode and the particle), but its shape is adjusting to minimize the interfacial energy. We will use cylindrical coordinates (assuming no dependence of particle shape on azimuthal angle), the Ag-electrode plane is at z=0, and the Ag nano-particle is attached to the electrode by surface 0 = 0 2 , thus, ( = 0) = 0 (Supplement Fig.   12a). There are three different interfaces (Supplement Fig. 12b) which areas are changing when the Ag-nanoparticle detaching from the electrode: the free surface S1 of the Agelectrode (not contacting to the nanoparticle), the contact surface S2 between nanoparticle and the electrode, and the surface S3 of the nanoparticle itself (not contacting to the electrode). All interfaces can have different interfacial energies per unit area, but, for our simple estimates, we assume that the surface energy per unit area of interfaces S1 and S3 with 〈 2 〉 = ℏ/2 and = � / (here is mass of Ag nano-clusters). To accommodate quantum uncertainty, we assume that the particle was in its ground state at t=0: ( , = 0) = � ℏ � 1/2 − 2 /ℏ (note that the solution will be very similar if we use any other Gaussian distribution as the initial state). Here, is the probability density describing probability to find a particle at The probability of the particle to escape between time moments t, and t+dt can be written as dt ℙ/ . On the other hand, the same probability is determined by the escape time distribution, that is q = ℙ/ . Finally, using the expression for , we derive equation where we introduce the following parameters: . Note that at classical limit (ℏ ≪ B ) the equation reduces to ( 2 − 1) −1 ) used in main text. Supplementary Fig. 7 illustrates what time delay distributions one can expect at low temperatures when quantum fluctuations start to play an essential role. Since we observed a shift of the probability distribution maximum to the left (in Supplementary Fig. 6), which contradicts to the simulated results in Supplementary Fig. 7, we believe that quantum effects are not dominant for the described device at temperatures around 300 K, but can be important at lower temperatures.

Supplementary Note 2 | RC effect introduces deterministic shift to the delay time
Due to the RC effect in real experiments, the voltage across the device is approaching to its stationary value exponentially ( ) = (1 − − / 0 ) with characteristic "RC-time" 0 and the pulse amplitude . On the other hand, the memristor can switch to its low resistance state if ( ) > tr , thus, resulting in a deterministic delay which diverges to infinity for → tr and decrease as RC = 0 tr / for ≫ tr .

Supplementary Note 3 | 3D nanoparticle simulations of diffusive memristors
To analyze to what extend diffusion in higher dimensions is important in the analysis of our experimental data we perform 3D simulations. We used the following Langevin equations for nanoparticles particles: (note that here we ignore direct current 0, +1 from the bottom to the top electrodes). The voltage loop Kirchhoff's law reduces to the following equations 0, 0, + , , = 0, 0, for < . All these algebraic equations (for example, 21 equations for 6 particles) for currents should be solved simultaneously at each time step, thus, considerably slowing down the simulations. For this reason, we perform simulations either for six nano-particles (when building histogram, panel b) or for 9 nanoparticles (for G(t) dependence (panel a) and particle locations (panels 1-6) in the Supplementary Fig. 8.
Qualitatively, the obtained results for 3D simulations are quite similar to the results for 1D simulations: after a certain stochastic delay the resistance abruptly jumps almost to its maximum value due to the fast formation of conducting paths between electrodes (panels 1-3). The path can be bent (see panel 3), the direction of the bending is spontaneous in our model since potentials are symmetric along y and z directions (of course in practice the bending direction can be predetermined by the device structure).
When the voltage is off, the conducting path gradually dissolves and nanoparticles are retrapped by the Ag-electrode. The distribution of the delay time also can be well fitted ( Supplementary Fig. 8b by the equation obtained in Note 1). Note, that this model can be very useful for multi-terminal devices, for example, electric fields can be also applied along ether y or z directions.

Supplementary Note 4: Increase bitrate by combining diffusive memristor TRNG with a linear-feedback shift register (LFSR)
The diffusive memristor TRNG can be combined with a Fibonacci linear-feedback shift register (LFSR), which can be used to further increase the random bit generation rate.
The working principal is shown in Supplementary Fig. 11. To demonstrate the feasibility, we simulated a seeded LFSR using MATLAB and diffusive memristor TRNG data. In our simulations, we used a 16-bit LFSR with feedback taps at bits 1, 2, 4, and 15 5 . To seed the LFSR, we re-seeded with 16 random bits after every 50 × 16 LFSR output bits.
In this case, the bitrate is increased by 50 times (from 6 kbs -1 to 300 kbs -1 ). We successfully produced 50 M binary bits from 1 M random bits generated by the diffusive memristor TRNG. Supplementary Table 1 shows these 50 M new generated bits also passed all 15 NIST tests without any post-processing 6 . Carefully reseeding the LFSR could be able to produce higher quality of random bits than using the TRNG alone 7 . It should also be noted that the bitrate can be further improved by engineering, such as