Multipurpose silicon photonics signal processor core

Integrated photonics changes the scaling laws of information and communication systems offering architectural choices that combine photonics with electronics to optimize performance, power, footprint, and cost. Application-specific photonic integrated circuits, where particular circuits/chips are designed to optimally perform particular functionalities, require a considerable number of design and fabrication iterations leading to long development times. A different approach inspired by electronic Field Programmable Gate Arrays is the programmable photonic processor, where a common hardware implemented by a two-dimensional photonic waveguide mesh realizes different functionalities through programming. Here, we report the demonstration of such reconfigurable waveguide mesh in silicon. We demonstrate over 20 different functionalities with a simple seven hexagonal cell structure, which can be applied to different fields including communications, chemical and biomedical sensing, signal processing, multiprocessor networks, and quantum information systems. Our work is an important step toward this paradigm.

1. Regarding my original questions 1 and 2, the authors provide answers in a) which included the following: a) " FIR filters are based either on cascades/lattices of 3-dB tunable MZIs or transversal filter configurations. For both alternatives, synthesis and recursive scaling algorithms have been developed in the literature and are available (Refs [42], [43] in the paper). No specific algorithms are required for the hexagonal waveguide mesh if we can show that they can implement either a 3-dB tunable MZI cascade" The architectures employed in Refs [42] and [43] are different from the architecture in the manuscript. Hence, I do not agree that a possibility of 3 dB tunable MZI cascade is sufficient for proving the existence of synthesis and recursive scaling algorithms. Refs [42] and [43] (and subsequent papers in the literature) also provided details of how poles and zeros can be reconfigured, and how recursive formulas are utilized in multi-stage units. This was important in scalability discussions. On the other hand, the revised manuscript is still incomplete from this perspective. As commented on the original manuscript, "One should note that there are many examples of reconfigurable optical filters that do not have associated synthesis algorithms, and therefore they cannot be used for universal applications." My impression is that this hexagonal architecture may not have well-established synthesis or recursive algorithms.
2. Regarding my original questions 1 and 2, the authors provide answers in b) which included the following: b) "In this case, detailed synthesis and recursive scaling algorithms have been reported for triangular (References [51] and [36] in the paper) by Reck et al. and Miller,respectively,and rectangular configuration (reference [38] in the paper) by Clements et al. In the supplementary material of the revised version, we demonstrate that both the triangular as well as the rectangular mode transformer configurations can be implemented with the hexagonal waveguide mesh and provide the exact adaptation relationships between the parameters of the In summary, this revised manuscript can experimentally show some of the functionalities of previously published universal photonic processors or lattice filters, but has not fully formulated scalable synthesis and recursive algorithms. At the present form, I do not recommend publication of this revised manuscript in Nature Communications.

Reviewer #2 (Remarks to the Author):
The authors have addressed my concerns in the previous review. Some minor suggestions: 1. The title may be revised by adding "signal" before processor, since the processor is a signal processor.
2. In the summary, "an integrated reconfigurable photonic universal processor" may be revised to be "an integrated reconfigurable photonic signal processor core" I would like to recommend publication of the manuscript in Nature Communications after the minor revisions.
Reviewer #4 (Remarks to the Author): The new paragraph in the introduction is inconsistent with that in the "Reply to Reviewers". Actually, the one inn Reply to Reviewers make a lot more sense, as it is better written. I suggest that that one is used: "Zhuang and co-workers 39 have pioneered the field by proposing a programmable optical chip architecture connecting MZI devices in a square-shaped mesh network grid. The distinctive feature of this approach is that it enables both feedforward and feedbackward configurations, selecting the adequate path through the mesh and providing independent tuning of circuit parameters to complex valued coefficients by introducing phase tuning elements in both arms of the MZIs to enable independent control of amplitude and phase of light at coupler outputs 39,40".

Reviewer #1 (Remarks to the Author):
The revised manuscript includes discussions on algorithms, and provides partial explanations to the comments I have made on the original manuscript, but does not seem to fully address them.

1.
Regarding my original questions 1 and 2, the authors provide answers in a) which included the following: (and subsequent papers in the literature) also provided details of how poles and zeros can be reconfigured, and how recursive formulas are utilized in multi-stage units. This was important in scalability discussions. On the other hand, the revised manuscript is still incomplete from this perspective. As commented on the original manuscript, "One should note that there are many examples of reconfigurable optical filters that do not have associated synthesis algorithms, and therefore they cannot be used for universal applications." My impression is that this hexagonal architecture may not have well-established synthesis or recursive algorithms.

2.
Regarding my original questions 1 and 2, the authors provide answers in b) which included the following: b) "In this case, detailed synthesis and recursive scaling algorithms have been reported for triangular (References [51] and [36] in the paper) by Reck et al. and Miller,respectively,and rectangular configuration (reference [38]  In summary, this revised manuscript can experimentally show some of the functionalities of previously published universal photonic processors or lattice filters, but has not fully formulated scalable synthesis and recursive algorithms. At the present form, I do not recommend publication of this revised manuscript in Nature Communications.

Authors' reply:
We thank the reviewer for his comments and share his concerns regarding the issue of the availability of a scalable synthesis algorithm. In this respect, we have been trying to understand his point and in our opinion we believe that there is a misinterpretation of what we are actually reporting, most probably because we were not able to transmit it adequately.
We think that the reviewer is expecting a specific synthesis procedure for the hexagonal waveguide mesh architecture. Our impression is reinforced by some of the sentences in his/her report such as: "My impression is that this hexagonal architecture may not have well-established synthesis or recursive algorithms" or "the architectures employed in Refs [51] and [36] are different from the architecture in the manuscript". This is actually NOT what we are reporting in the paper. What we are actually reporting is a hardware structure, which can be programmed to emulate the specific configurations of both common FIR+IRR filters as well as the two published layouts for triangular and rectangular unitary transforming circuits. We are not claiming that this hardware structure can implement the former circuits in a different way based on a generic synthesis algorithms ad-hoc designed for it. The hexagonal waveguide mesh per se is just a programmable hardware platform supporting multiple configurations and not a specific layout. We are aware that this is a very subtle point and this is the reason why we insist that it works in a similar way as an FPGA in electronics, which not being a specific architecture is programmed to emulate different electronic subsystems.
This leads, therefore, to the question of synthesis algorithms and scalability. Since the mesh emulates particular architectures, then the main point is to show that their synthesis algorithms can be directly translated into specific parameter values of the Mach-Zehnder Interferometers (MZI) that are needed to implement the waveguide coupling points required to emulate a particular structure. This justifies, for example the remark "there will not be a unique solution for each intended unitary operation" made by the reviewer as a given unitary operation can be either be implemented by an emulated triangular or an emulated rectangular multiple input/multiple output configuration. Simply stated, yes there can be several solutions to implement an intended unitary operation, each one corresponding to a different structure or layout (i.e triangular or rectangular MZI arrangement), but once the structure that emulates the transformation is chosen then that solution is unique. Now, the translation equations are direct for typical discrete FIR and IIR filters, while they are more elaborate for universal linear transformers, which have been derived and exposed in detail (including the scalability) in the Supplementary material.

Action performed:
We have tried to explain thoroughly this point in the initial part of subsection Synthesis algorithms and Scalability inside the Results section. The main new material is at the beginning and reads as follows: