Multifunctional molybdenum disulfide flash memory using a PEDOT:PSS floating gate

Two-dimensional transition metal dichalcogenide materials (TMDs), such as molybdenum disulfide (MoS2), have been considered promising candidates for future electronic applications owing to their electrical, mechanical, and optical properties. Here, we present a new concept for multifunctional MoS2 flash memory by combining a MoS2 channel with a PEDOT:PSS floating layer. The proposed MoS2 memory devices exhibit a switching ratio as high as 2.3 × 107, a large memory window (54.6 ± 7.80 V), and high endurance (>1,000 cycles). As the PEDOT:PSS film enables a low-temperature solution-coating process and mechanical flexibility, the proposed P-memory can be embedded on a polyimide substrate over a rigid silicon substrate, offering high mechanical endurance (over 1,000 cycle bending test). Furthermore, both MoS2 and PEDOT:PSS have a bandgap that is desirable in optoelectronic memory operation, where charge carriers are stored differently in the floating gate depending on light illumination. As a new application that combines photodiodes and memory functions, we demonstrate multilevel memory programming based on light intensity and color. By combining the MoS2 channel with the PEDOT:PSS floating layer, a new concept device is proposed. This work demonstrates optoelectronic memory operation with high mechanical endurance through a 1,000-cycle bending test, which also offers multilevel memory programming operation based on light intensity and color.


Introduction
With the advent of the fourth industrial revolution, consumer electronics are in dire need of versatility beyond conventional electronic functions [1][2][3][4] . For example, conventional memory technology requires high-performance memory characteristics, such as fast switching, long-term retention, and high endurance [5][6][7][8] . On the other hand, current electronics demand the development of multifunctional memory devices with characteristics such as mechanical flexibility 9-11 , multilevel storage 12,13 , neuromorphic functions 14,15 , and tunable memory operation 16 , along with the conventional expectation of excellent memory features. However, existing silicon-based memory processes and structures have limitations in developing new features when the multifunctional memory deviates from the conventional complementary metal-oxide-semiconductor process frame. Therefore, with the development of new materials, the development of new electronic device concepts is crucial.
Here, we present multifunctional nonvolatile memory using a molybdenum disulfide (MoS 2 ) semiconductor and a poly (3,4-ethylenedioxythinophene):poly(styrene sulfonate) (PEDOT:PSS) 31 floating gate (P-memory). The combination of the MoS 2 semiconductor and PEDOT:PSS floating gate provides a switching current ratio as high as 2.3 × 10 7 , a large memory window up to 62 V, excellent endurance (>1000 cycles), and a long retention time (>2000 s). We also investigate device-to-device variation by examining 30 P-memory devices fabricated with the same fabrication process. This process results in uniform memory operation properties with average I erase /I program of 2.18 × 10 6 ± 4.77 × 10 6 , memory window of 54.3 V ± 7.80 V, threshold voltage under the programmed state V TH, programmed of 16.40 ± 8.25 V, and threshold voltage under the erased state V TH, erased of −40.53 ± 5.87 V. Furthermore, the proposed P-memory has photoprogrammable memory behavior, as photoinduced charge carriers contribute to programming and erasing operations in P-memory. As a result, we demonstrate photosensing with nonvolatile memory behavior to distinguish illumination light intensity and color. This information is stored directly inside the floating gate. Finally, we implement P-memory embedded onto a flexible polyimide (PI) substrate, as both MoS 2 and PEDOT:PSS can be simply deposited regardless of the substrate type. The fabricated P-memory on the PI substrate exhibits excellent memory operation (I erase /I program = 1.07 × 10 6 ) with a high mechanical endurance (over 1000 cycle bending test). This result suggests that the multifunctional characteristics of a flash memory device can be obtained from a new material combination of layered MoS 2 and PEDOT: PSS polymer in a floating-gate transistor structure.

Device fabrication
The device fabrication process is schematically shown in Fig. S1. A Si/SiO 2 substrate was treated with O 2 plasma for 5 min. A synthesized highly resistive PEDOT:PSS solution was spin-coated on the substrate at 8000 rpm for 60 s through a 0.45 µm syringe filter. The thin film was then thermally annealed on a hot plate at 150°C for 10 min. After floating-gate formation on the Si/SiO 2 substrate, Al 2 O 3 of 80 nm thickness as the tunneling dielectric layer (TDL) was deposited on the PEDOT:PSS floating-gate layer using ALD. To utilize MoS 2 flakes as the channel, mechanically exfoliated MoS 2 flakes were transferred onto the TDL by peeling them from a bulk crystal using Scotch tape. To complete the P-memory device fabrication, Ti/Au (20 nm/100 nm) source/drain electrodes, respectively, were patterned by photolithography using AZ GXR-601 photoresist, followed by E-beam evaporation and an etching process. Next, a 20 nm-thick Al 2 O 3 passivation layer (PL) was deposited on the P-memory device by using ALD. For flexible memories, a flexible substrate was prepared by spin coating solution-based PI on a cleaned SiO 2 /Si substrate (3000 rpm for 30 s). Then, the flexible device was fabricated following the same process as shown in Scheme 1. As the last step, the flexible memory was peeled off by carefully separating the edges of the flexible memory and rigid substate with tweezers, which completed the flexible memory fabrication process.

Synthesis of the highly resistive PEDOT:PSS solution
Poly(4-styrene sulfonate) (PSS) was used as a dispersant and dopant for PEDOT. The weight ratio of PEDOT:PSS was controlled to be 1:7.5. To synthesize the PEDOT:PSS dispersion, PSS (18.75 g) was added to distilled water (1000 g), and the mixture was stirred for 30 min. Then, nitrogen gas (99.999%) was bubbled through the solution for 60 min at a rate of 3 L min −1 to prevent oxidation by the dissolved oxygen in the water. To this solution, the EDOT monomer (2.50 g, 1.76 × 10 −2 mol) was added and stirred with a mechanical stirrer for 30 min. The synthesis of the PEDOT:PSS dispersion was carried out using an Fe 3+ -catalyzed oxidative polymerization process. The oxidizing agents iron(III) sulfate (0.035 g, 8.79 × 10 -5 mol) and sodium persulfate (5.02 g, 2.1 × 10 -2 mol) were dissolved in 100 mL of distilled water by sonication and added to the reaction solution. Polymerization was performed for 40 h at 25°C with bubbling nitrogen gas. After polymerization of the PEDOT:PSS dispersion, the product was mixed with 500 mL of a mixture of cation and anion ion exchange resin for 1 h and filtered with a 30 μm mesh filter. Table 1 shows previous reports about solvent exchange processes for water-based PEDOT:PSS solutions.

Device characterization
The memory operation characteristics of MoS 2 flash memory devices were determined with a Keithley 4200-SCS semiconductor characterization system equipped with a probe station in the dark under ambient atmosphere. For determining the photoinduced memory operation properties, illumination sources of 638 nm and 405 nm (MCLS1, Thorlabs) and 532 nm (MGL-FN-532, CNI) were used. The incident power densities of the illumination light were measured by a laser power meter (PM100A, Thorlabs). To perform a cyclic bending test, the flexible MoS 2 flash memory was loaded onto a multimodal bending tester, which repeated the sequence of a tensile stress (1 s)/flat (1 s) cycle 1000 times. The surface morphology and thickness profile of MoS 2 were measured using atomic force microscopy (XE7, Park Systems).

Results and discussion
Flash memory structure based on MoS 2 and PEDOT:PSS First, we fabricated the P-memory on a rigid SiO 2 /Si substrate. The memory device is composed of multilayer MoS 2 (thickness of 94.09 nm) as the channel; PEDOT:PSS of 80 nm thickness as the floating gate; 80 nm-and 40 nmthick Al 2 O 3 as a TDL and a PL, respectively; Ti/Au (20 nm/100 nm) as source/drain electrodes, respectively; and a 300 nm SiO 2 /Si substrate as a blocking dielectric layer (BDL) and a control gate (CG) (Fig. 1a). Further details of the fabrication process are provided in Fig. S1, and thickness scans are shown in Fig. S2.
We spin-coated a PEDOT:PSS layer on top of a BDL SiO 2 layer, and thereby, the PEDOT:PSS acted as a charge trapping layer for data storage operation (Fig. 1b, c). To understand the effects of the floating-gate layer, we characterized the MoS 2 transistor depending on the existence of the PEDOT:PSS floating gate using the same device structure and fabrication conditions. The MoS 2 transistor without the PEDOT:PSS floating gate exhibited transfer characteristics without I-V hysteresis (Fig. 1d). On the other hand, the P-memory with the PEDOT:PSS floating gate exhibited transfer characteristic with a large memory window of 54.6 V ± 7.80 V, indicating that the PEDOT:PSS floating gate between the TDL and BDL layers acts as a charge storage layer ( Fig. 1e and Fig. S3), showing a switching ratio as high as 2.3 × 10 7 .

Electrical characteristics of the P-memory
To investigate the endurance of the P-memory, we performed 1000 consecutive sweeps of programming and erasing operations (V program = 60 V and V erase = −60 V) (Fig. 1f). The measured endurance of the P-memory exhibited stable programming and erasing operations with average I erase of 1.4 ± 0.25 µA, I program of 9.46 ± 11.7 pA, and I erase /I program of 1.07 × 10 6 under 1000 consecutive sweep cycles. We also evaluated the dynamic behavior of the P-memory (Fig. S4). Stable switching behavior between the programmed and erased states was  shift of V TH . By enlarging the applied CG voltage V CG bias in the P-memory, the degree of V TH shift was controlled (Fig. S5). With greater applied V G and thus energy band bending to inject more electron carriers into the floating gate, a larger shift of V TH can be obtained.
To investigate the reproducibility and uniformity of the P-memory, we fabricated and characterized 30 devices. Figure 2a, b shows the statistical variation of the I program / I erase ratio (average value = 2.18 × 10 6 ± 4.77 × 10 6 ) and the memory window (average value = 54.6 V ± 7.80), respectively, in the 30 devices. The distribution shows that the devices with an I program /I erase ratio ≥10 5 comprisẽ 75% of the 30 devices. In addition, 17 devices have a memory window ranging from 50 V to 60 V,~50% of the total. Figure 2c, d presents the V TH distribution in the programmed state (V program = 60 V) and erased state (V erase = −60 V), respectively. The obtained average V TH is 16.40 ± 8.25 V in the programmed state and −40.53 ± 5.87 V in the erased state. Details of the 30 P-memory device characteristics are given in Figs. S6 and S7.

Photoactivation effect on the P-memory
In the P-memory, the illumination light wavelength and intensity information can be stored as multilayered MoS 2and PEDOT:PSS-polymer-generated photoactivated excess carriers (Fig. 3a, b). To study the photoactivation effect on the operation of the P-memory, we illuminated it with light (excitation wavelength λ ex = 405 nm and incident optical power densities P inc = 1 and 5 mW/cm 2 ) during programming and erasing operations (i.e., photoinduced programming and photoinduced erasing, respectively). After the respective photoinduced programming and erasing operations, we performed a DC sweep of the Pmemory to observe how light illumination influences the charge programming and erasing behavior (Fig. 3d, e). When programming in the dark state was activated, V TH shifted to the positive side, showing V TH = 7.18 V, whereas when the programming was operated under a light illumination of P inc = 1 mW/cm 2 , a smaller V TH shift to V TH = 4.23 V was observed. The observed phenomenon is attributable to the charge screening effect of the photogenerated excess carriers, preventing tunneling of electron carriers into the floating PEDOT:PSS layer (Fig. 3c). As a result, a smaller V TH shift is induced by the programming under light illumination.
It was observed that a higher P inc = 5 mW/cm 2 resulted in more photogenerated excess carriers that contributed to the screening effect, and thus, less of a V TH shift (V TH = 3.75 V) was observed compared to that of the programmed state under P inc = 1 mW/cm 2 (Fig. 4a). We also investigated the light illumination effects during the erasing operation. Different from the photoinduced programming behavior, there was no V TH change under the photoinduced erasing operation. Rather than a change in the V TH shift, the photoinduced erasing operation resulted in an increase in the on-current in the switching-on region (V G > 10 V). The observed increase in the on-current resulted from the slow decay of the generated photocurrent in the multilayered MoS 2 , which supports previously reported phenomena in several studies [35][36][37] . The photoinduced programming and erasing behaviors under other light illumination (λ ex = 532 and 638 nm) are shown in Figs. S8-11.

Photosensing memory operation
The photoinduced programming behavior with a change in V TH shift allowed us to demonstrate multilevel photomemory applications that combine photodiodes with memory functions. During the programming operation, the P-memory is programmed differently depending on the presence or absence of light illumination and its light intensity, and thus, the degree of light exposure can be directly stored in the device. We illuminated blue light (λ ex = 405 nm) onto the P-memory during the programming operation at V P = 30 V, and we sequentially measured the read current at V R = 0 V as a function of the photosensing retention time (Fig. 5a). The programming operation at V P = 30 V in the dark resulted in the P-memory exhibiting V TH = 7.18 V, which produced a current of 1-2 pA (I R ) at V R = 0 V across the entire range of the photosensing retention time. On the other hand, the programming operation at V P = 30 V under light illumination enabled the P-memory to provide a more than thousandfold higher I R than that in the programmed state in the dark. The increased I R with photoactivated programming was unchanged over the entire range of the photosensing retention time test (>400 s) (Fig. 5b). A higher light intensity resulted in a higher I R with a lower resistance state of the P-memory (Fig. 5c). Under red and green light illumination (λ ex = 532 and 638 nm), we also observed similar I R increases. As expected, light with a lower wavelength enabled the Pmemory to have a greater I R increase with a lower resistance state, which potentially provides a classification operation according to the wavelength of light (Fig. 5d, Figs. S12 and S13).
Mechanically flexible device manufacturing of the Pmemory As the MoS 2 and PEDOT:PSS layers can be manufactured on top of flexible substrates owing to their excellent thermal budget (<200°C), we next implemented flexible P-memory. A solution-based PI film was coated on a Si/SiO 2 substrate, and flexible P-memory was fabricated with the same process as for the rigid memory (Scheme 1). For the BDL and the TDL, we deposited 100 nm-and 80 nm-thick Al 2 O 3 , respectively. By delaminating the P-memory with the PI film from the substrate, we obtained flexible P-memory (Fig. 6a, b). Further details of the flexible P-memory fabrication are given in the Experimental Section. The flexible P-memory exhibited a large memory window, ΔV = 60 V, obtained by programming/erasing the charges in the PEDOT:PSS floating layer, as we described in the P-memory operation part (Fig. 6c). The amount of V TH shift can be controlled by the applied V CG bias, in which a higher V CG bias results in a larger V TH shift toward the negative or positive side depending on V erase and V program , respectively.
To evaluate the mechanical durability of the flexible Pmemory, we measured its I-V transfer characteristics before and after 1000 bending cycles at a bending radius of curvature r = 5 mm (Fig. 7a, Supporting Video 1). Details of the bending test are given in the Experimental Section. The flexible P-memory exhibited the same I-V transfer characteristics without any degradation or current change compared to those before the 1000 bending cycles. The observed excellent mechanical durability resulted from the layered structure of MoS 2 and the high flexibility of the PEDOT:PSS layer. To further investigate whether the flexible P-memory operated effectively after 1000 bending cycles, we performed a memory retention test (Fig. 7c). The current ratio of the programmed and erased states was above hundred for 8000 s of the retention measurement time.

Photosensing memory operation of the flexible P-memory
We also tested the photosensing retention time of the flexible P-memory after 1000 bending cycles (Fig. 7d). As expected, lower wavelength light illumination under the programming operation (V program = 35 V) allowed the device to exhibit a higher I R , so the flexible P-memory provided distinguishable resistance states depending on the light exposure properties. The abovementioned comprehensive memory tests confirmed that flexible Pmemory exhibited no abnormality in the memory or photoactivated memory operations even after 1000 bending cycles.

Conclusions
In summary, we proposed P-memory that combines a layered MoS 2 thin-film transistor structure with a PEDOT:PSS floating gate. Owing to the virtues of the MoS 2 and PEDOT:PSS combined structure, the Pmemory exhibited high performance, including a high switching current ratio >10 7 , a large memory window >50 V, excellent endurance >1000 cycles, and a long retention time >2000 s. These were confirmed by multiple device fabrication and characterization to evaluate the reproducibility and uniformity (>30 devices). We also achieved a photoactivated memory operation that combines photodiode and memory functions. Depending on whether light was illuminated, the P-memory provided a different degree of programming, and thus, the degree of light exposure could be stored directly in the device. Furthermore, we demonstrated flexible P-memory by manufacturing the device on a flexible PI substrate. The results indicated that the device maintained its multifunctional memory behavior even after 1000 bending cycles. Through comprehensive experiments, this study showed not only the memory characteristics of conventional floating-gate-based flash memory but also new versatility such as mechanical flexibility and photoactivated memory behavior. These reported results are expected to be useful guidelines in the development of new electronic device features using new nanomaterials.