Manufacture and characterization of graphene membranes with suspended silicon proof masses for MEMS and NEMS applications

Graphene’s unparalleled strength, chemical stability, ultimate surface-to-volume ratio and excellent electronic properties make it an ideal candidate as a material for membranes in micro- and nanoelectromechanical systems (MEMS and NEMS). However, the integration of graphene into MEMS or NEMS devices and suspended structures such as proof masses on graphene membranes raises several technological challenges, including collapse and rupture of the graphene. We have developed a robust route for realizing membranes made of double-layer CVD graphene and suspending large silicon proof masses on membranes with high yields. We have demonstrated the manufacture of square graphene membranes with side lengths from 7 µm to 110 µm, and suspended proof masses consisting of solid silicon cubes that are from 5 µm × 5 µm × 16.4 µm to 100 µm × 100 µm × 16.4 µm in size. Our approach is compatible with wafer-scale MEMS and semiconductor manufacturing technologies, and the manufacturing yields of the graphene membranes with suspended proof masses were >90%, with >70% of the graphene membranes having >90% graphene area without visible defects. The measured resonance frequencies of the realized structures ranged from tens to hundreds of kHz, with quality factors ranging from 63 to 148. The graphene membranes with suspended proof masses were extremely robust, and were able to withstand indentation forces from an atomic force microscope (AFM) tip of up to ~7000 nN. The proposed approach for the reliable and large-scale manufacture of graphene membranes with suspended proof masses will enable the development and study of innovative NEMS devices with new functionalities and improved performances.

In contrast to previously reported graphene membranes and beams, MEMS and NEMS devices such as accelerometers, gyroscopes and resonators often employ larger proof masses (e.g.,~10 7 to~10 10 µm 3 in size) that are suspended on springs in the form of membranes, beams or cantilevers. Graphene, as a robust and intrinsically nanoscale material, could be used to suspend large proof masses, thereby forming spring-mass systems consisting of atomically thin graphene springs for potential applications as ultra-miniaturized transducer elements in future high-performance NEMS devices 20 . However, the realization of suspended graphene with large attached proof masses is difficult, and to the best of our knowledge, no such examples have been reported in the literature. A previous report of suspended graphene membranes with very small masses included micrometre-sized few-layer graphene cantilevers with diamond allotrope carbon masses (0.5 µm in length, 1.5 µm in width and 20 nm in thickness, with a corresponding weight of 5.7 × 10 −14 g) fabricated using focused ion beam (FIB) deposition for the study of the mechanical properties of graphene 45 . Previous literature also reports a spiral spring, a kirigami pyramid and a variety of cantilevers based on a suspended graphene monolayer supporting 50 -nm thick gold masses attached to suspended cantilevers 46 . However, these structures had to be kept in a liquid to maintain their mechanical integrity. Suspended graphene membranes with diameters of 3-10 µm, that were circularly clamped by a polymer (SU-8) and that supported a mass made of either SU-8 or gold located at the centre of the membrane, were reported for shock detection caused by ultrahigh mechanical impacts 47 . However, all previous reports involved extremely small masses, and the fabrication methods employed, such as FIB-induced deposition, were slow and typically not compatible with large-scale manufacturing.
In this paper, we present a robust, scalable and highyield manufacturing approach to realize CVD graphene membranes with large suspended silicon (Si) proof masses that is compatible with MEMS and NEMS manufacturing processes and that can be utilized for devising NEMS with graphene membranes as structural and functional components. Our approach employs a silicon-on-insulator (SOI) substrate to form silicon proof masses that are etched in the silicon device layer of the SOI wafer. The graphene membranes are formed by transferring a double layer of CVD graphene to the pre-patterned SOI wafer, followed by a combination of dry etching and vapour HF etching of the buried oxide (BOX) layer to release the silicon proof masses and suspend them on the graphene membranes.
Static and dynamic mechanical characterization of the manufactured structures shows that they are robust and can potentially be used as springmass systems in future ultra-small NEMS, such as resonators and accelerometers.

Results
To demonstrate the feasibility of graphene membranes with large suspended proof masses, we fabricated square membranes with different dimensions made of doublelayer graphene on which silicon proof masses of different sizes were suspended. A typical device structure is illustrated in Fig. 1a-e. Our fabrication approach utilizes an SOI wafer where the silicon proof mass is formed in the device layer of the SOI wafer by dry etching, followed by transfer of double-layer graphene to the SOI wafer and release of the proof mass by sacrificially removing the BOX layer using dry etching in combination with vapour HF etching. A schematic of the fabrication and integration process is shown in Fig. 1f-i, and three-dimensional (3D) and cross-sectional views of the structure at key process steps are shown in Fig. 2 (see the Materials and methods section for details). Scanning electron microscopy (SEM) images of typical graphene membrane structures with suspended silicon proof masses are shown in Fig. 3. The process scheme of patterning the SOI substrate prior to graphene transfer reduces the processing steps after graphene transfer, which improves the cleanliness and purity of the graphene and reduces the risk of rupturing or destroying the membranes during processing. Each layer of the SOI substrate has a specialized function: the device layer is used for fabricating trenches and defining the proof masses, the handle substrate is used as a support and the BOX layer is used as a sacrificial layer to gently release the mass. In our demonstration, we have chosen SOI wafers with thicknesses of the silicon device layer, the BOX layer and the handle layer of 15 µm, 2 µm, and 400 µm, respectively, as depicted in Fig. 1c. Here, the thickness of the silicon device layer was chosen to form proof masses with reasonable aspect ratios, but can in principle be adapted to specific application requirements.
To demonstrate the flexibility and robustness of our fabrication process and of the resulting graphene structures, we designed and fabricated structures with different trench widths and the silicon proof mass dimensions. The dimensions of the smallest trenches were 1 µm × 7 µm, and the dimensions of the largest trenches were 5 µm × 110 µm, resulting in square graphene membranes with dimensions from 7 µm × 7 µm to 110 µm × 110 µm. The smallest proof mass suspended on a graphene membrane consisted of a square cuboid measuring 5 µm × 5 µm × 16.4 µm, and the largest mass consisted of a square cuboid measuring 100 µm × 100 µm × 16.4 µm. The trench depth was 16.4 µm, which is identical to the thickness of the silicon mass, consisting of a 15 µm thick silicon device   Table 1, it can be seen that the weight of this proof mass is three orders of magnitude larger than the SU-8 mass, six orders of magnitude larger than the gold mass and seven orders of magnitude larger than the carbon mass that have been reported previously, respectively [45][46][47] . The dramatically increased weight of the suspended proof mass is potentially of interest for applications such as miniaturized NEMS inertial sensors.
(see figure on previous page) Fig. 1 3D diagrams of the structures and SEM images. a 3D schematic of the graphene membrane with a suspended proof mass. b-e 3D schematic top view, side view, bottom view and cross-sectional view, respectively. Schematic of the fabrication and integration process: f Trench etching: (f1) SOI wafer, (f2) oxidation of both wafer sides, (f3) trench etching of the SiO 2 layer on the silicon device layer, (f4) trench etching of the silicon device layer, (f5) removal of PR residues. g Backside etching: (g1) backside of the chip, (g2) patterning of the PR layer on the backside of the chip, (g3) backside etching of the SiO 2 layer, (g4) backside etching of the handle substrate, (g5) the chip after backside etching. h Graphene transfer: (h1) monolayer graphene on a copper sheet, (h2) spin coating of PMMA, (h3) etching of carbon residues on the backside of the copper sheet, (h4) dissolution of the copper in FeCl 3 , (h5) graphene monolayer on a second copper sheet, (h6) transfer of the PMMA/graphene stack to the graphene on the second copper sheet, (h7) etching of the carbon residues from the backside of the copper sheet, (h8) spinning of PMMA on the graphene, (h9) dissolution of the copper in FeCl 3 , (h10) transfer of the double-layer graphene stack on the pre-patterned SOI substrate. i Proof mass release: (i1) backside of the chip, (i2) RIE etching of the BOX layer until a thin (~100 nm) SiO 2 layer remains, (i3) the chip after RIE etching, (i4) vapour HF etching to remove the remaining thin SiO 2 layer. SEM images of different graphene membranes with suspended proof masses are shown in Fig. 3a-c and Fig. 3d, e, with the structure in Fig. 3a-c being free of holes in the suspended graphene membrane and the structure in Fig. 3d, e featuring a hole in the graphene membrane. To demonstrate the complete release of the proof mass, SEM characterization of the backside of the SOI chips was performed (Fig. 3f, g). From these SEM images, it can be seen that the BOX layer was completely removed, which means that our fabricated proof masses are suspended and only attached to the graphene membranes. The strong attachment of the SiO 2 /Si proof mass to the graphene membrane is due to the large adhesion energy between the graphene and the SiO 2 surface of the proof mass that is caused by van der Waals forces 48,49 . Extremely strong adhesion of graphene to SiO 2 surfaces by van der Waals interactions has been previously demonstrated by experiments, analytical models and atomistic simulations 49,50 .
To verify that double-layer graphene indeed exists in our fabricated structures, we performed Raman spectroscopy. Figure 4a shows the Raman spectra of double-layer   graphene at three different positions (Fig. 4b) of a manufactured structure with 4 µm wide trenches and a 50 µm × 50 µm × 16.4 µm proof mass. The Raman spectra show the typical characteristic peaks of graphene: The "G peaks" at~1600 cm −1 (Fig. 4c) and the "2D peaks" at 2700 cm −1 (Fig. 4d) 51,52 demonstrate the presence of graphene, and the absence of an appreciable D peak (1350 cm −1 ) in the Raman spectra indicates the relatively high quality of the graphene. The shape of the 2D band in Fig. 4d indicates the presence of double-layer graphene. The second-order Raman 2D band caused by a twophonon lattice vibrational process is sensitive to the number of layers of graphene, and the 2D band of monolayer graphene is very sharp and symmetric 53 . For double-layer and multi-layer graphene, the 2D band becomes much broader, as shown in Fig. 4, mainly due to the change in the electronic structure of the graphene 53 .
To characterize the dynamic mechanical properties of the spring-mass system of our structures, we determined the resonance frequencies of four structures in vacuum (using a vacuum chamber with 10 −5 mbar actively pumped vacuum) by measuring the amplitude of their thermomechanical noise using laser Doppler vibrometry (LDV) (   Fig. 5e-h). The resonance frequencies of these devices are~158 kHz (Fig. 5a), 90 kHz (Fig. 5b),~78.8 kHz (Fig. 5c), and~60.3 kHz (Fig. 5d). As expected, the resonance frequency decreases with an increase in the weight of the suspended proof mass (Fig. 5a-d). The corresponding quality factor (Q) of one of the structures (Fig. 5g) is estimated by using a Lorentz fitting to their resonance frequencies of~63 (Fig. 5c). The Q-factor is comparable with those reported in a b 25 µm previous studies 10,11,13,15,40,54 . Since these measurements were performed in vacuum, we can claim that the Q-factors of our structures are likely dominated by energy losses in the mechanical structure itself, such as losses from internal friction in the double-layer graphene membranes, clamping losses, surface losses and thermoelastic damping [55][56][57] .
To further confirm the frequency response of the spring-mass system of our structures, we used LDV to measure the frequency response of a device with a trench width of 3 µm and proof mass dimensions of 50 µm × 50 µm × 16.4 µm in air (atmospheric pressure) at room temperature by driving the device with a piezoshaker (Fig. 6). Figure 6a displays the amplitude and phase response as a function of frequency. The resonance frequency (88.1 kHz) of the device is of the same order as those found using thermomechanical noise measurements (Fig. 5). The corresponding Q-factor of the structure (Fig. 6c)   ~148 (Fig. 6b), which is comparable with those based on thermomechanical noise measurements (Fig. 5). Since our graphene membranes and proof masses are not located close to a surface in the direction of the movement of the membrane, we do not expect squeeze-film damping when the structure is operated in gas at atmospheric pressure. The measured value of Q in air confirms our hypothesis.
To characterize the static mechanical properties and robustness of our graphene structures, we performed force-displacement measurements using AFM tip indentation at the centre of a suspended proof mass of a structure with 4 µm wide trenches and a proof mass size of 20 µm × 20 µm × 16.4 µm (Fig. 7a-c). As shown in Fig. 7b, when the AFM indentation force gradually increased from 15.5 nN to 6968 nN, the displacement of the proof mass increased from 7.7 nm to 697 nm. Surprisingly, even when the AFM indention force was increased to 6968 nN, the graphene membrane did not rupture. For reference, the weight of a 20 µm × 20 µm × 16.4 µm large silicon proof mass causes a force due to earth gravity that is on the order of 0.156 nN. Thus, our results illustrate that the suspended graphene membranes with attached proof mass are generally very robust and potentially useful for application in future NEMS inertial sensors. The corresponding average strain in the suspended graphene membranes at the maximum displacement (697 nm) of the proof mass is estimated to be on the same order or smaller than the ones reported in AFM indentation experiments on fully clamped graphene membranes 1,58,59 (Supplementary Tables S1, S2 in the Supporting Information). We hypothesize that circular graphene membranes and proof mass designs might have even better mechanical robustness due to the avoidance of corners that are prone to stress concentrations. Another potential advantage of circular membranes and proof mass designs is that circular symmetry may result in more uniform strain distributions in the graphene membrane.
To analyse the yield of our process, we performed systematic experiments by manufacturing a series of graphene membrane structures with different dimensions (trenches widths from 1 µm to 5 µm and proof masses measuring from 5 µm × 5 µm × 16.4 µm to 100 µm × 100 µm × 16.4 µm) and characterizing the resulting structures by SEM. We fabricated twelve chips that comprised 672 structures in different batches, and we obtained similar yields for all chips. Figures 8-12 show typical examples of suspended graphene membranes with different trench widths (1 µm, 2 µm, 3 µm, 4 µm, 5 µm) and with attached proof masses of different dimensions (from 5 µm × 5 µm × 16.4 µm to 100 µm × 100 µm × 16.4 µm) after releasing the BOX layers. There are some graphene membrane structures without any holes (Figs. 8a-c, 11a, b). However, typically, a few small holes in the suspended graphene membranes were present, although most of the structures maintained their mechanical integrity (Figs. 8d, 9, 10). Even for most of the large membranes with wide trenches (5 µm) and large proof masses (100 µm × 100 µm × 16.4 µm), the sizes of the holes were comparably small (Figs. 8d, 10d, 11d, 12). For the small membranes with narrow trenches and small proof masses, slightly more of the obtained graphene membranes lacked holes or had only very small holes. The sizes of the holes in the suspended graphene membranes are related to the dimensions of the attached masses and the widths of the trenches. For instance, for structures with 1 µm wide trenches and 40 µm × 40 µm × 16.4 µm masses,~15% of the structures were defect-free, without any holes in the suspended graphene membranes (Fig. 13a), while~40% of the structures had tiny and small-scale (~0-1 µm in side length) holes (Fig. 13b, c), 35% of the structures had medium-scale (~1-5 µm in side length) holes (Fig. 13d), and~10% of the structures had large-scale (>5 µm in side length) holes (Fig. 13e). The reasons that such different sizes of holes occurred in the suspended graphene membranes are not presently clear. In-plane tension, shear and compression of the suspended graphene are some possibilities. Another possibility is that during graphene wet transfer, there might be some water remaining in the trenches after transferring graphene. During the subsequent process steps, the water remaining in the trenches might evaporate and rupture the suspended graphene membranes. In addition, occasional tears might occur at mechanically weak grain boundaries between crystals in the CVD growth graphene. We also  estimated the yield in dependence of the area of the suspended graphene membrane over the trenches, and we found that there was no obvious difference among different trench sizes (from 1 µm to 5 µm) or among proof structure. For instance, a 100% coverage area, as shown in Fig. 13a, means that there are no holes in the graphene membrane. When the widths of the trenches and the sizes of the masses increase, the size of the holes in the graphene membrane typically increase. However, the ratio of the graphene membrane coverage area to the total trench area was similar among structures with different trenches and mass sizes. In summary,~15% of the graphene membranes had 100% coverage of the trenches,~75% of the graphene membranes had >90% coverage of the trenches,~90% of the graphene membranes had >75% coverage of the trenches and~10% of the graphene membranes had <75% coverage of the trenches (Fig. 14).

Discussion
For certain applications, it is desirable to obtain graphene membranes with as few polymer residues on the graphene as possible. Such applications include devices for mechanical and electrical characterization of graphene, resonators, high-mobility electronics and gas and biomolecule sensors 60 . During graphene transfer, we used PMMA as a support layer for the graphene, as this allowed easy handling and transfer of the graphene. Even after thorough rinsing with organic solvents such as acetone, PMMA residues (long-chain molecules) remain adhered to the graphene due to the strong dipole interactions between PMMA and chemical groups on a Mass   graphene 60 . To remove as many of the PMMA residues as possible, we selected some sample chips with released proof masses for annealing at 350°C for 2 h. During the annealing process, the temperature was first steadily increased from 100°C to 350°C in 1 h and then decreased from 350°C to 100°C in 1 h. The surface of the graphene after annealing was cleaner (Fig. 12) than the surface of graphene without annealing (Figs. [8][9][10][11][12]. However, some PMMA residues remained on the surface of the graphene even after annealing (Fig. 3b, c).
To evaluate the graphene quality after annealing, one sample chip was annealed at 350°C for 1 h in vacuum and subsequently characterized using Raman spectroscopy (Fig. 15). Figure 15a shows the Raman spectra of the double-layer graphene at three different positions of the structure. The Raman spectrum shows the typical characteristic peaks of graphene, with the "G peak" occurring at~1600 cm −1 (Fig. 15d) and the "2D peak" occurring at 2700 cm −1 (Fig. 15e), demonstrating the presence of graphene. The relatively weak "D peak" at positions 1 and 2 occurring at~1359.6 cm −1 indicates that the quality of the suspended graphene membranes might decrease to some extent, while a negligible "D peak" at position 3 occurring at~1351 cm −1 indicates relatively high quality of graphene (Fig. 15c)  of stress and doping across the graphene patch might result in correlated variation in the height and position of Raman peaks to some extent. The impact of hightemperature annealing on graphene, such as enhanced hole doping or defects in graphene, has been widely reported on the basis of Raman spectroscopy studies [61][62][63][64] . It was also shown that annealing at temperatures below 500°C in vacuum results in a significant decrease in the "D peak" and "2D peak" due to annealing-induced enhanced doping in graphene, and annealing in a vacuum at temperatures of up to 1000°C results in a significant increase in the "2D peak" with a continuous decrease in the "D peak", indicating the partial removal of the defects and restoration of the damaged lattice 63 .
We experimented with several different process flows to fabricate graphene membranes with suspended proof masses and found that wet HF etching was hard to control and often caused graphene displacement, wrinkles or collapse of the graphene due to etching of the SiO 2 layer underneath the graphene 65 . In addition, the release process of the proof masses occurring in the liquid environment (liquid HF, etc.) increased the probability of the masses being detached from the suspended graphene membranes due to capillary forces. Only employing HF vapour to etch the BOX layer required a very long time and increased the risks associated with overetching of the BOX layer. To increase the yields as well as the quality and efficiency of the fabrication process, dry etching followed by vapour HF etching was the preferred approach here.
We also evaluated the possibility of transferring monolayer graphene over the trenches using our baseline process (Fig. 1). However, in this way, it was extremely difficult to obtain suspended monolayer graphene membranes with attached proof masses at high-quality and high yield. When using monolayer graphene, our fabrication yield was on the order of 1%, the resulting structures were extremely sensitive, and manual handing was difficult without destroying the structures. We found that the number of holes in a suspended monolayer graphene was extremely high, the size of the holes also increased substantially, and the total coverage area of the suspended monolayer graphene decreased substantially compared with the situation with double-layer graphene membranes. Furthermore, the suspended monolayer graphene completely disappeared over the trenches in many of the fabricated structures. In addition, 100% coverage of monolayer graphene over trenches (meaning that there were no holes in the monolayer graphene) was not achieved in our experiments. We transferred monolayer graphene over trenches on more than ten chips, and identical results (super low yields) were obtained. Thus, we conclude that double-layer graphene can substantially improve the manufacturing yield of membranes with suspended proof masses compared with monolayer graphene. Double-layer graphene membranes are much stronger than monolayer graphene membranes, which substantially enhances the survival rate of suspended graphene membranes in the entire fabrication process. However, if monolayer graphene membranes with suspended proof masses can be successfully manufactured, for example, by using high-quality CVD monolayer graphene with larger grains that are on the order of hundreds of micrometers in diameter, such membranes would be less stiff and of potential interest for future graphenebased NEMS devices. We also hypothesize that tri-layer graphene or multi-layer graphene would further improve the fabrication yield compared with double-layer graphene, but at the same time, it would most likely increase the membrane stiffness. Increased manufacturing yield and device robustness could be potentially beneficial for large-scale manufacturing of graphene NEMS devices targeted at industrial applications such as accelerometers, gyroscopes and resonators. In summary, in this paper, we have reported a robust route to transfer and integrate double-layer graphene membranes onto a silicon substrate. The proposed manufacturing process is based on SOI wafer technology and allows the suspension of large silicon proof masses on graphene membranes. Our approach is scalable and highly compatible with silicon NEMS technology, and complementary metal oxide semiconductor (CMOS) wafers for the integration of NEMS devices with electronic circuits. The ability of the graphene membranes to withstand AFM indentation forces of up to~7000 nN without failure indicates that the structures are very robust. Thus, the ability to realize graphene membranes with suspended large proof masses offers interesting opportunities for ultra-miniaturized graphene NEMS devices such as accelerometers, gyroscopes and resonators, with exciting applications in nanoscale robotics, autonomous vehicles, wearable as well as consumer electronics and the internet of things (IoT).

Materials and methods
The SOI wafer was thermally oxidized to grow a 1.4 µm thick SiO 2 layer on both sides of the wafer (Fig. 1f2). A photoresist (PR) layer was spin-coated on the SiO 2 surface and patterned to define the trench areas for subsequent etching of the SiO 2 and the silicon device layers. Reactive ion etching (RIE) was used to etch the SiO 2 layer (Fig. 1f3). The 15 μm thick silicon device layer was etched with deep reactive ion etching (DRIE) to form the trenches and define the proof masses. After silicon trench etching, the remaining PR was removed using oxygen plasma etching (Figs. 1f5, 2a). After trench etching, the backside of the SOI wafer was patterned using a PR layer that was spin-coated on the surface of the SiO 2 layer on the SOI substrate using lithography with backside alignment (Fig. 1g1, g2). Then, the SiO 2 layer was selectively etched by an RIE etching process (Fig. 1g3). Both the patterned PR and SiO 2 layers were used as protection to pattern the silicon handle substrate of the SOI wafer using a DRIE process (Fig. 1g4). The PR residues were then removed by an oxygen plasma etch (Figs. 1g5, 2b).
Commercially available CVD monolayer graphene films on copper (Graphenea, Spain) were used. A standard wet transfer approach was employed 66,67 , and double-layer graphene was obtained by transferring two graphene monolayers on top of each other (Fig. 1h1-h8). The resulting double-layer graphene was then transferred from the copper substrate to the prefabricated SOI substrate ( Fig. 1h9-h11). Then, a poly(methyl methacrylate) (PMMA) solution (AR-P 649.04, ALLRESIST, Germany) was spin-coated on the front side of the first graphene/ copper foils at 500 rpm for 5 s followed by 1800 rpm for 30 s and then baked for 5 min at 85°C on a hot plate to evaporate the solvents and cure the PMMA (~200 -nm thick) (Fig. 1h2). Then, carbon residues on the backside of the copper foil were removed using O 2 plasma etching at low power (80 W) (Fig. 1h3). For wet etching of the copper, the copper foil was placed in a solution of iron(III) chloride hexahydrate (FeCl 3 ), where the copper foil floated on the FeCl 3 solution with the graphene side facing away from the liquid. Then, with the help of a silicon-carrier wafer, the PMMA/graphene stack without copper (Fig. 1h4) was first transferred onto the surface of deionized (DI) water, then onto a diluted HCl solution and, finally, back to DI water for cleaning, removing the FeCl 3 residues and removing chloride residues, respectively. During these transfer processes, it is necessary to keep the PMMA/graphene stack floating on the surface of the liquids and to keep the graphene side on top to ensure that the PMMA covering the graphene is not wetted by the etching solutions. A second graphene on copper foil was used for a second graphene layer transfer (Fig. 1h5). The PMMA/graphene stack floating on the DI water was transferred on the top side of the second graphene/copper foil (Fig. 1h6) and subsequently placed on a hotplate at 45°C to increase the adhesion between the two graphene layers. Carbon residues on the backside of the copper were removed using O 2 plasma etching (Fig. 1h7). A layer of PMMA was spin-coated on the surface of the PMMA/ double-layer graphene/copper stack (Fig. 1h8) using process parameters identical to those used for the transfer of the first graphene layer. Then, the same processes were performed to remove the copper substrate (Fig. 1h9) and to transfer the final PMMA/double-layer graphene stack to the pre-patterned SOI substrate (Fig. 1h10). The SOI substrate was then baked at 45°C on a hotplate for 10 min to dry it and to improve the adhesion between the doublelayer graphene and the SiO 2 surface. Next, the SOI substrate was placed in acetone for 24 h to remove the PMMA and subsequently placed in isopropanol for 5 min to remove the acetone residues. A nitrogen gun was used to gently dry the chip, followed by baking at 45°C for 10 min on a hot plate, which concluded the preparation of the resulting substrates with graphene membranes suspended over trenches (Figs. 1h11, 2c1-c5).
To freely suspend the silicon proof masses on the doublelayer graphene membranes, RIE dry etching followed by vapour HF etching was used to effectively remove the BOX layer (2 µm thick SiO 2 ) (Fig. 1c), while minimizing the risk of damaging the graphene membranes on the top side of the substrate. Therefore, the chips were attached to the surface of a clean 100 -mm diameter silicon-carrier wafer by using Kapton tape (Fig. 1i1). To prevent the plasma and the etching gases (such as CHF 3 , CF 4 , Ar, O 2 , N 2 ) from exposing and destroying the graphene, all four sides of the chip were sealed by Kapton tape. Then, an RIE etching process was employed to etch the main part of the BOX layer (Fig. 1i2). To avoid complete removal of the SiO 2 layer and subsequent etching and destroying the suspended graphene membranes, only part of the SiO 2 layer was etched by carefully tuning the etching time for the SiO 2 layer to reach a thickness of the remaining SiO 2 layer of 100 nm. HF vapour was then used to continue etching the 100 -nm thick SiO 2 . The vapour HF etching setup (Fig. 2d1) was temperature controlled, and HF vapour was prevented from reaching the front side of the substrate while the SiO 2 layer still retained its integrity. A 25% HF solution was placed in the vapour HF chamber, and the temperature was adjusted to 40°C. The vapour HF etch rate was calibrated, and the 100 -nm thick SiO 2 layer was removed in less than 10 min, thereby releasing the silicon proof masses and suspending them from the graphene membranes (Fig. 2d). Despite a slight overetching at the time the SiO 2 was removed, the suspended graphene membranes were not destroyed by the short exposure to HF vapour.
Optical microscopy and SEM imaging were used to observe and characterize the morphology of the devices during and after device fabrication. Raman spectroscopy (alpha300 R, WITec) was used to verify the presence and quality of the double-layer graphene of the manufactured devices. For static mechanical characterization, an AFM (Dimension Icon, Bruker) with a cantilever (Olympus AC240TM) and an AFM tip (tip radius = 15 nm) was used to load defined forces at the centre of a proof mass on a graphene membrane to measure the force vs. proof mass displacement and the maximum force that the suspended graphene membrane can withstand without rupture. The spring constant of the AFM cantilever was calibrated to be 5.303 N/m. To measure the resonance frequency and quality factor of the structures, we used an LDV (Polytec UHF-120) with a laser spot size on the order of 2.5 µm to detect the amplitude of the thermomechanical noise of the structures in vacuum (~10 −5 mbar actively pumped vacuum) and the amplitude of structures that were driven by a piezoshaker in air (atmosphere pressure).