Integrated all-photonic non-volatile multi-level memory

Abstract

Implementing on-chip non-volatile photonic memories has been a long-term, yet elusive goal. Photonic data storage would dramatically improve performance in existing computing architectures1 by reducing the latencies associated with electrical memories2 and potentially eliminating optoelectronic conversions3. Furthermore, multi-level photonic memories with random access would allow for leveraging even greater computational capability4,5,6. However, photonic memories3,7,8,9,10 have thus far been volatile. Here, we demonstrate a robust, non-volatile, all-photonic memory based on phase-change materials. By using optical near-field effects, we realize bit storage of up to eight levels in a single device that readily switches between intermediate states. Our on-chip memory cells feature single-shot readout and switching energies as low as 13.4 pJ at speeds approaching 1 GHz. We show that individual memory elements can be addressed using a wavelength multiplexing scheme. Our multi-level, multi-bit devices provide a pathway towards eliminating the von Neumann bottleneck and portend a new paradigm in all-photonic memory and non-conventional computing.

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Figure 1: Operation principle of the all-optical on-chip memory device.
Figure 2: Reversible and reproducible single-shot switching.
Figure 3: A multi-bit, multi-wavelength architecture.
Figure 4: Multi-level operation of the all-photonic memory element.

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Acknowledgements

The authors acknowledge support by Deutsche Forschungsgemeinschaft (DFG) grants PE 1832/1-1 and PE 1832/2-1 and EPSRC grant EP/J018783/1. C.R. is grateful to JEOL UK and the Clarendon Fund for funding his graduate studies. M.S. acknowledges support from the Karlsruhe School of Optics and Photonics (KSOP) and the Stiftung der Deutschen Wirtschaft (sdw). H.B. acknowledges support from the John Fell Fund and the EPSRC (EP/J00541X/2 and EP/J018694/1).The authors also acknowledge support from the DFG and the State of Baden-Württemberg through the DFG-Center for Functional Nanostructures (CFN) within subproject A6.4. This work was partly carried out with the support of the Karlsruhe Nano Micro Facility (KNMF, http://www.knmf.kit.edu), a Helmholtz Research Infrastructure at Karlsruhe Institute of Technology (KIT, http://www.kit.edu). The authors thank S. Diewald for assistance with device fabrication and M. Blaicher for technical assistance with device design.

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All authors contributed substantially. W.H.P.P. and H.B. conceived, planned and supervised the project. C.R. and M.S. fabricated the samples and realized the reversible switching and multilevel measurements, and the thermo-optical response and speed measurements. P.H., C.D.W. and H.B. deposited and characterized the GST. D.W. and T.S. performed the TEM analysis of the specimen. All authors analysed the data and helped write the manuscript.

Corresponding authors

Correspondence to Harish Bhaskaran or Wolfram H. P. Pernice.

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The authors declare no competing financial interests.

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Ríos, C., Stegmaier, M., Hosseini, P. et al. Integrated all-photonic non-volatile multi-level memory. Nature Photon 9, 725–732 (2015). https://doi.org/10.1038/nphoton.2015.182

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