On-chip optical buffers based on waveguide delay lines might have significant implications for the development of optical interconnects in computer systems. Silicon-on-insulator (SOI) submicrometre photonic wire waveguides are used, because they can provide strong light confinement at the diffraction limit, allowing dramatic scaling of device size. Here we report on-chip optical delay lines based on such waveguides that consist of up to 100 microring resonators cascaded in either coupled-resonator or all-pass filter (APF) configurations. On-chip group delays exceeding 500 ps are demonstrated in a device with a footprint below 0.09 mm2. The trade-offs between resonantly enhanced group delay, device size, insertion loss and operational bandwidth are analysed for various delay-line designs. A large fractional group delay exceeding 10 bits is achieved for bit rates as high as 20 Gbps. Measurements of system-level metrics as bit error rates for different bit rates demonstrate error-free operation up to 5 Gbps.
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This work was partially supported by the DARPA Slow Light program. The authors are grateful to C. Schow, L. Schares and D. Kuchta for help with BER and eye-diagram measurements, to S. McNab, B. Banke and J. Robert for AFM and LER measurements, and to W. Green for useful discussions.
The authors declare no competing financial interests.
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Xia, F., Sekaric, L. & Vlasov, Y. Ultracompact optical buffers on a silicon chip. Nature Photon 1, 65–71 (2007). https://doi.org/10.1038/nphoton.2006.42
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