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Evolution of a designless nanoparticle network into reconfigurable Boolean logic


Natural computers exploit the emergent properties and massive parallelism of interconnected networks of locally active components1,2,3. Evolution has resulted in systems that compute quickly and that use energy efficiently, utilizing whatever physical properties are exploitable4. Man-made computers, on the other hand, are based on circuits of functional units that follow given design rules5,6. Hence, potentially exploitable physical processes, such as capacitive crosstalk, to solve a problem are left out7,8. Until now, designless nanoscale networks of inanimate matter that exhibit robust computational functionality had not been realized. Here we artificially evolve the electrical properties of a disordered nanomaterials system (by optimizing the values of control voltages using a genetic algorithm) to perform computational tasks reconfigurably. We exploit the rich behaviour that emerges from interconnected metal nanoparticles, which act as strongly nonlinear single-electron transistors9,10, and find that this nanoscale architecture can be configured in situ into any Boolean logic gate. This universal, reconfigurable gate would require about ten transistors in a conventional circuit. Our system meets the criteria for the physical realization of (cellular) neural networks11: universality (arbitrary Boolean functions), compactness, robustness and evolvability, which implies scalability to perform more advanced tasks12,13. Our evolutionary approach works around device-to-device variations and the accompanying uncertainties in performance. Moreover, it bears a great potential for more energy-efficient computation, and for solving problems that are very hard to tackle in conventional architectures14,15,16.

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Figure 1: Schematic of the device layout and working principle.
Figure 2: Reconfigurable Boolean logic gates.
Figure 3: Stability and robustness of logic gates.
Figure 4: Addition functionality using a two-input-two-output gate.


  1. Hopfield, J. J. Neural networks and physical systems with emergent collective computational abilities. Proc. Natl Acad. Sci. USA 79, 2554–2558 (1982).

    Article  CAS  Google Scholar 

  2. Watts, D. J. & Strogatz, S. H. Collective dynamics of ‘small-world’ networks. Nature 393, 440–442 (1998).

    Article  CAS  Google Scholar 

  3. Wiesenfeld, K. & Moss, F. Stochastic resonance and the benefits of noise: from ice ages to crayfish and squids. Nature 373, 33–36 (1995).

    Article  CAS  Google Scholar 

  4. Toffoli, T. Nothing makes sense in computing except in the light of evolution. Int. J. Unconv. Comput. 1, 1–29 (2005).

    Google Scholar 

  5. Goldstine, H. H. & Von Neumann, J. in John von Neumann Collected Works Vol. 5 (ed. Taub, A. H.) 1–32 (Macmillan, 1963).

  6. Turing, A. M. On computable numbers, with an application to the Entscheidungsproblem. J. Math. 58, 345–363 (1936).

    Article  Google Scholar 

  7. Conrad, M. The Price of Programmability (Springer, 1995).

    Book  Google Scholar 

  8. Lloyd, S. Ultimate physical limits to computation. Nature 406, 1047–1054 (2000).

    Article  CAS  Google Scholar 

  9. Likharev, K. K. Single-electron devices and their applications. Proc. IEEE 87, 606–632 (1999).

    Article  CAS  Google Scholar 

  10. Wasshuber, C. Computational Single-Electronics (Springer, 2001).

    Book  Google Scholar 

  11. Dogaru, R. Universality and Emergent Computation in Cellular Neural Networks (World Scientific Series on Nonlinear Science Series A 43, World Scientific, 2003).

  12. Bandyopadhyay, S. & Roychowdhury, V. Computational paradigms in nanoelectronics: quantum coupled single electron logic and neuromorphic networks. Jpn. J. Appl. Phys. 35, 3350–3362 (1996).

    Article  Google Scholar 

  13. Asai, T. & Oya, T. in Artificial Life Models in Hardware (eds Adamatzky, A. & Komosinski, M.) 133–159 (Springer, 2009).

    Book  Google Scholar 

  14. Likharev, K. K. & Korotkov, A. N. Single-electron parametron: reversible computation in a discrete-state system. Science 273, 763–765 (1996).

    Article  CAS  Google Scholar 

  15. Feynman, R. P. Simulating physics with computers. Int. J. Theor. Phys. 21, 467–488 (1982).

    Article  Google Scholar 

  16. Siegelmann, H. T. & Sontag, E. D. Analog computation via neural networks. Theor. Comput. Sci. 131, 331–360 (1994).

    Article  Google Scholar 

  17. Yoshihito, A. Information processing using intelligent materials—information-processing architectures for material processors. J. Intel. Mater. Syst. Str. 5, 418–423 (1994).

    Article  Google Scholar 

  18. Miller, J. F. & Downing, K. in Proceedings of the 2002 NASA/DOD Conference on Evolvable Hardware 167–176 (IEEE, 2002).

    Book  Google Scholar 

  19. Miller, J. F., Harding, S. L. & Tufte, G. Evolution-in-materio: evolving computation in materials. Evol. Intel. 7, 49–67 (2014).

    Article  Google Scholar 

  20. Tour, J. M. et al. Nanocell logic gates for molecular computing. IEEE Trans. Nanotechnol. 1, 100–109 (2002).

    Article  Google Scholar 

  21. Chen, R. H., Korotkov, A. N., & Likharev, K. K. Single-electron transistor logic. Appl. Phys. Lett. 68, 1954–1956 (1996).

    Article  CAS  Google Scholar 

  22. Nakajima, F., Miyoshi, Y., Motohisa, J. & Fukui, T. Single-electron AND/NAND logic circuits based on a self-organized dot network. Appl. Phys. Lett. 83, 2680–2682 (2003).

    Article  CAS  Google Scholar 

  23. Maeda, K. et al. Logic operations of chemically assembled single-electron transistor. ACS Nano 6, 2798–2803 (2012).

    Article  CAS  Google Scholar 

  24. Heath, J. R., Kuekes, P. J., Snider, G. S. & Williams, R. S. A defect-tolerant computer architecture: opportunities for nanotechnology. Science 280, 1716–1721 (1998).

    Article  CAS  Google Scholar 

  25. Snider, G. S. & Williams, R. S. Nano/CMOS architectures using a field-programmable nanowire interconnect. Nanotechnology 18, 035204 (2007).

    Article  Google Scholar 

  26. Merolla, P. A. et al. A million spiking-neuron integrated circuit with a scalable communication network and interface. Science 345, 668–673 (2014).

    Article  CAS  Google Scholar 

  27. Kirkpatrick, S., Gelatt, C. D. & Vecchi, M. P. Optimization by simulated annealing. Science 220, 671–680 (1983).

    Article  CAS  Google Scholar 

  28. Holland, J. H. Adaptation in Natural and Artificial Systems: An Introductory Analysis with Applications to Biology, Control, and Artificial Intelligence (Univ. Michigan Press, 1975).

    Google Scholar 

  29. Valiant, L. G. Evolvability. JACM 56, 3 (2009).

    Article  Google Scholar 

  30. Rodríguez-Vázquez, A. et al. ACE16k: the third generation of mixed-signal SIMD-CNN ACE chips toward VSoCs. IEEE Trans. Circuits Syst. I 51, 851–863 (2004).

    Article  Google Scholar 

  31. Pohl, H. A. Dielectrophoresis: the Behavior of Neutral Matter in Nonuniform Electric Fields (Cambridge Monographs in Physics, 80, Cambridge Univ. Press, 1978).

    Google Scholar 

  32. Bernard, L., Calame, M., van der Molen, S., Liao, J. & Schönenberger, C. Controlled formation of metallic nanowires via Au nanoparticle ac trapping. Nanotechnology 18, 235202–235207 (2007).

    Article  Google Scholar 

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We thank A.-J. Annema, M. Danish, J. Huskens, S. Intan, M. de Jong, J. Mikhal, B. Nauta, D. Reinhoudt, I. Rianasari, E. Strambini, F. Zwanenburg and all the collaborators of the NASCENCE project for fruitful discussions. We acknowledge financial support from MESA+, CTIT, the European Community's Seventh Framework Programme (FP7/2007–2013) under grant agreement No. 317662 and the European Research Council, ERC Starting Grant No. 240433.

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Authors and Affiliations



S.K.B. and C.P.L. fabricated the samples, carried out the experiments and performed the data analysis. C.P.L. designed and programmed the genetic search algorithm. R.M.J.v.D. contributed with theoretical inputs. W.G.v.d.W. conceived the experiments, and planned and supervised the project. H.J.B. conceived the project together with W.G.v.d.W. and cosupervised. Z.L. and K.S.M. contributed to the sample fabrication. All the authors discussed the results, provided important insights and helped write the manuscript.

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Correspondence to W. G. van der Wiel.

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Bose, S., Lawrence, C., Liu, Z. et al. Evolution of a designless nanoparticle network into reconfigurable Boolean logic. Nature Nanotech 10, 1048–1052 (2015).

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