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Arrays of single-walled carbon nanotubes with full surface coverage for high-performance electronics

Abstract

Single-walled carbon nanotubes have exceptional electronic properties and have been proposed as a replacement for silicon in applications such as low-cost thin-film transistors and high-performance logic devices1. However, practical devices will require dense, aligned arrays of electronically pure nanotubes to optimize performance, maximize device packing density and provide sufficient drive current (or power output) for each transistor2. Here, we show that aligned arrays of semiconducting carbon nanotubes can be assembled using the Langmuir–Schaefer method. The arrays have a semiconducting nanotube purity of 99% and can fully cover a surface with a nanotube density of more than 500 tubes/µm. The nanotube pitch is self-limited by the diameter of the nanotube plus the van der Waals separation, and the intrinsic mobility of the nanotubes is preserved after array assembly. Transistors fabricated using this approach exhibit significant device performance characteristics with a drive current density of more than 120 µA µm−1, transconductance greater than 40 µS µm−1 and on/off ratios of 1 × 103.

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Figure 1: Assembly and microscopic characterizations of full-coverage aligned arrays of semiconducting single-walled carbon nanotubes.
Figure 2: Optical spectroscopic characterization of full-coverage aligned arrays of semiconducting nanotubes.
Figure 3: Electrical properties of thin-film transistors that use 99% purity full-coverage semiconducting nanotube arrays with scaled gate dielectric.
Figure 4: Electrical properties of field-effect transistors that use 99% purity full-coverage semiconducting nanotube arrays and operate in direct transport regime.

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Acknowledgements

The authors thank J. Bucchignnano for technical assistance with electron-beam lithography, D. Farmer for assistance with atomic layer deposition of dielectrics for top-gated transistors, J.D. Tersoff for helpful discussions on the electrical properties of a bilayer structure, and J.B. Hannon and S. Guha for management support.

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Q.C. conceived and designed the experiments. Q.C. and S.J.H. performed the experiments and analysed the data. G.S.T. purified the nanotubes. Y.Z. performed TEM imaging. D.D. Lu performed the Technology Computer-Aided Design simulation. Q.C. wrote the manuscript. All authors discussed the results and commented on the manuscript.

Corresponding author

Correspondence to Qing Cao.

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Cao, Q., Han, Sj., Tulevski, G. et al. Arrays of single-walled carbon nanotubes with full surface coverage for high-performance electronics. Nature Nanotech 8, 180–186 (2013). https://doi.org/10.1038/nnano.2012.257

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