Highly scalable non-volatile and ultra-low-power phase-change nanowire memory

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Abstract

The search for a universal memory storage device that combines rapid read and write speeds, high storage density and non-volatility is driving the exploration of new materials in nanostructured form1,2,3,4,5,6,7. Phase-change materials, which can be reversibly switched between amorphous and crystalline states, are promising in this respect, but top-down processing of these materials into nanostructures often damages their useful properties4,5. Self-assembled nanowire-based phase-change material memory devices offer an attractive solution owing to their sub-lithographic sizes and unique geometry, coupled with the facile etch-free processes with which they can be fabricated. Here, we explore the effects of nanoscaling on the memory-storage capability of self-assembled Ge2Sb2Te5 nanowires, an important phase-change material. Our measurements of write-current amplitude, switching speed, endurance and data retention time in these devices show that such nanowires are promising building blocks for non-volatile scalable memory and may represent the ultimate size limit in exploring current-induced phase transition in nanoscale systems.

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Figure 1: Structural characterization and electrical switching behaviour of Ge2Sb2Te5 nanowires.
Figure 2: Ge2Sb2Te5 nanowire size-dependent memory switching properties.
Figure 3: Recrystallization (data-retention) properties of a 60-nm Ge2Sb2Te5 nanowire.
Figure 4: Size-dependent recrystallization dynamics of Ge2Sb2Te5 nanowires with thickness ranging from 30 nm to 200 nm.

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Acknowledgements

The authors would like to thank Hee-Suk Chung for helpful discussions. This work was supported by startup funds from the University of Pennsylvania, Materials Research Science & Engineering Center (MRSEC) seed award (DMR05-20020) and in part by NSF, DMR-0706381 and the University of Pennsylvania Research Foundation (URF) award.

Author information

R.A., S.L. and Y.J. conceived and designed the experiments. Y.J. and S.L. performed the experiments. R.A., S.L. and Y.J. analysed the data. R.A., S.L. and Y.J. co-wrote the paper.

Correspondence to Ritesh Agarwal.

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The authors declare no competing financial interests.

Supplementary information

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Supplementary information and figures S1-S3 (PDF 219 kb)

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Lee, S., Jung, Y. & Agarwal, R. Highly scalable non-volatile and ultra-low-power phase-change nanowire memory. Nature Nanotech 2, 626–630 (2007) doi:10.1038/nnano.2007.291

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