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Plasmonics

Electrifying plasmonics on silicon

Nature Materials volume 9, pages 3–4 (2010)Cite this article

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The realization of electrical sources of surface plasmon polaritons using complementary metal oxide semiconductor technology is a significant step towards silicon-compatible nanoscale photonic devices.

The silicon microelectronics industry has witnessed a continual progression towards more compact, high-speed and power-efficient devices over many decades. At present, CMOS foundries are capable of generating truly nanoscale devices composed of complex and intertwined dielectric, semiconductor and metallic structures. Together with the impressive advances in electronic and photonic-device simulations, an increasingly wide variety of integrated optoelectronic functionalities can be realized using mature silicon technology.

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Figure 1: An artist's rendition of an SPP source.

© R. VAN LOON / A. POLMAN

Figure 2: Schematic of an incoherent plasmonic slot source coupled to a low-loss dielectric waveguide.

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Authors and Affiliations

  1. Aaron Hryciw, Young Chul Jun and Mark L. Brongersma are in the Geballe Laboratory for Advanced Materials, Stanford University, Stanford, California 94305, USA.,

    Aaron Hryciw, Young Chul Jun & Mark L. Brongersma

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  1. Aaron Hryciw
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  2. Young Chul Jun
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  3. Mark L. Brongersma
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Correspondence to Mark L. Brongersma.

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Hryciw, A., Jun, Y. & Brongersma, M. Electrifying plasmonics on silicon. Nature Mater 9, 3–4 (2010). https://doi.org/10.1038/nmat2598

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