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Low-cost and nanoscale non-volatile memory concept for future silicon chips

Nature Materials volume 4, pages 347–352 (2005)Cite this article

Abstract

Non-volatile 'flash' memories are key components of integrated circuits because they retain their data when power is interrupted. Despite their great commercial success, the semiconductor industry is searching for alternative non-volatile memories with improved performance and better opportunities for scaling down the size of memory cells. Here we demonstrate the feasibility of a new semiconductor memory concept. The individual memory cell is based on a narrow line of phase-change material. By sending low-power current pulses through the line, the phase-change material can be programmed reversibly between two distinguishable resistive states on a timescale of nanoseconds. Reducing the dimensions of the phase-change line to the nanometre scale improves the performance in terms of speed and power consumption. These advantages are achieved by the use of a doped-SbTe phase-change material. The simplicity of the concept promises that integration into a logic complementary metal oxide semiconductor (CMOS) process flow might be possible with only a few additional lithographic steps.

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Figure 1: Concepts for phase-change non-volatile memories.
Figure 2: Phase-change materials used in optical and electrical memories.
Figure 3: Phase-change memory cells used to test feasibility of line concept.
Figure 4: Typical line-cell electrical characteristics.
Figure 5: Feasibility of fast and reversible programming of phase-change line-cells with low power.
Figure 6: Scaling of programming parameters of the line concept.

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Acknowledgements

We thank K. Attenborough, E. Bakkers and H. van Houten for comments on the manuscript, J. van Hulle, J. van Zijl, E. van den Heuvel and E. Evens for sample preparation, and F. Widdershoven and M. in 't Zandt for discussions about CMOS integration schemes and requirements.

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  1. Philips Research Laboratories, Prof. Holstlaan 4, Eindhoven, 5656 AA, The Netherlands

    Martijn H. R. Lankhorst, Bas W. S. M. M. Ketelaars & R. A. M. Wolters

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  1. Martijn H. R. Lankhorst
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Correspondence to Martijn H. R. Lankhorst.

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Lankhorst, M., Ketelaars, B. & Wolters, R. Low-cost and nanoscale non-volatile memory concept for future silicon chips. Nature Mater 4, 347–352 (2005). https://doi.org/10.1038/nmat1350

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