As the record single-junction efficiencies of perovskite solar cells now rival those of copper indium gallium selenide, cadmium telluride and multicrystalline silicon, they are becoming increasingly attractive for use in tandem solar cells due to their wide, tunable bandgap and solution processability. Previously, perovskite/silicon tandems were limited by significant parasitic absorption and poor environmental stability. Here, we improve the efficiency of monolithic, two-terminal, 1-cm2 perovskite/silicon tandems to 23.6% by combining an infrared-tuned silicon heterojunction bottom cell with the recently developed caesium formamidinium lead halide perovskite. This more-stable perovskite tolerates deposition of a tin oxide buffer layer via atomic layer deposition that prevents shunts, has negligible parasitic absorption, and allows for the sputter deposition of a transparent top electrode. Furthermore, the window layer doubles as a diffusion barrier, increasing the thermal and environmental stability to enable perovskite devices that withstand a 1,000-hour damp heat test at 85 ∘C and 85% relative humidity.
The rapid rise of perovskite solar cells with record single-junction efficiencies of over 22% (ref. 1) is the result of a unique combination of properties, including strong optical absorption2, long diffusion lengths3, and solution processability enabled by the relatively benign nature of intrinsic defects4. Additionally, their wide, tunable bandgap5 makes perovskites highly attractive for use in multijunction solar cells on top of narrower-bandgap absorbers, such as silicon, copper indium gallium selenideand Sn-containing perovskites6,7,8,9,10,11,12,13,14,15,16,17,18. This presents a pathway to achieving industry goals of improving efficiencies to over 30% (ref. 19) while maintaining low module cost20.
The first monolithic perovskite/silicon tandem was made with a diffused silicon p–n junction, a tunnel junction made of n+ hydrogenated amorphous silicon, a titania electron transport layer, a methylammonium lead iodide absorber, and a Spiro-OMeTAD hole transport layer8. The power conversion efficiency (PCE) was only 13.7% due to excessive parasitic absorption of light in the hole transport layer, limiting the matched current density to 11.5 mA cm−2. Switching to a silicon heterojunction bottom cell and carefully tuning layer thicknesses to reduce optical losses increased the current density to 15.9 mA cm−2 and raised the PCE to a record 21.2% (ref. 15). It is clear from these reports that minimizing parasitic absorption in the window layers is crucial to achieving higher current densities and efficiencies in monolithic tandems. To this end, the window layers through which light first passes before entering the perovskite and silicon absorber materials must be highly transparent. The front electrode must also be conductive to carry current laterally across the top of the device. Indium tin oxide (ITO) is widely utilized as a transparent electrode in optoelectronic devices such as flat-panel displays, smart windows, organic light-emitting diodes, and solar cells due to its high conductivity and broadband transparency21. ITO is typically deposited through magnetron sputtering; however, the high kinetic energy of sputtered particles can damage underlying layers22. In perovskite solar cells, a sputter buffer layer is required to protect the perovskite and organic carrier-extraction layers from damage during sputter deposition. The ideal buffer layer should also be energetically well aligned so as to act as a carrier-selective contact, have a wide bandgap to enable high optical transmission, and have no reaction with the halides in the perovskite. Additionally, this buffer layer should act as a diffusion barrier layer to prevent both organic cation evolution and moisture penetration to overcome the often-reported thermal and environmental instability of metal halide perovskites23. Previous perovskite-containing tandems utilized molybdenum oxide (MoOx) as a sputter buffer layer9,11,12, but this has raised concerns over long-term stability, as the iodide in the perovskite can chemically react with MoOx (ref. 24).
Mixed-cation perovskite solar cells have consistently outperformed their single-cation counterparts. The first perovskite device to exceed 20% PCE was fabricated with a mixture of methylammonium and formamidinium (FA)25. Recent reports have shown promising results with the introduction of caesium mixtures, enabling high efficiencies with improved photo-, moisture and thermal stability26,27,28,29,30. The increased moisture and thermal stability are especially important as they broaden the parameter space for processing on top of the perovskite, enabling the deposition of metal oxide contacts through atomic layer deposition31,32 (ALD) or chemical vapour deposition (CVD) that may require elevated temperatures or water as a counter reagent. Both titanium dioxide (TiO2) and tin oxide (SnO2) have consistently proved to be effective electron-selective contacts for perovskite solar cells and both can be deposited via ALD at temperatures below 150 ∘C (refs 33,34,35).
Here, we introduce a bilayer of SnO2 and zinc tin oxide (ZTO) that can be deposited by either low-temperature ALD or pulsed-CVD as a window layer with minimal parasitic absorption, efficient electron extraction, and sufficient buffer properties to prevent the organic and perovskite layers from damage during the subsequent sputter deposition of a transparent ITO electrode. These layers, when used in an excellent mixed-cation perovskite solar cell atop a silicon heterojunction solar cell tuned to the infrared spectrum, enable highly efficient perovskite/silicon tandem solar cells with enhanced thermal and environmental stability.
Single-junction perovskite solar cells
We first fabricated single-junction perovskite solar cells on ITO-coated glass to develop a transferable architecture for monolithic tandem solar cells on silicon. We fabricated the Cs0.17FA0.83Pb(Br0.17I0.83)3 (CsFA) perovskite top cell, with a bandgap of 1.63 eV (Supplementary Fig. 1), in the p–i–n architecture, in which the electron-selective contact is deposited on top of the perovskite absorber layer and acts as a window layer. Suitable contacts for this geometry include low work-function metal oxides such as zinc oxide (ZnO), TiO2 and SnO2. Figure 1a displays a schematic of the device structure. The perovskite was deposited on top of nickel oxide (NiOx)—a hole-selective contact—to achieve higher voltage and stability than with the traditional poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS) contact36,37. The CsFA perovskite was deposited from a stoichiometric solution containing CsI, formamidinium iodide, PbI2, and PbBr2 in a mixture of dimethylformamide and dimethyl sulfoxide. This deposition method was modified from the literature27 and the full details of device fabrication are provided in the Methods.
To deposit an electron-selective contact, we attempted to use phenyl-C61-butyric acid methyl ester (PCBM) and aluminium-doped zinc oxide nanoparticles, which were previously used successfully in a methylammonium lead iodide (MAPbI3) perovskite solar cell38; however, the devices were largely shunted due to the high surface roughness of the CsFA perovskite (Supplementary Fig. 2). Spin coating on rough surfaces requires thick, planarizing layers to be applied to prevent shunt pathways, leading to lower optical transmission (Supplementary Fig. 2). Evaporation, ALD and CVD enable the fabrication of uniform, conformal, thin films with high optical transmission, regardless of surface texture. SnO2 can be deposited by ALD using tetrakis(dimethylamino)tin(IV) (TDMASn) and water at temperatures as low as 30 ∘C (ref. 39), although deposition temperature is known to affect the stoichiometry and electronic properties of metal oxide films40. We use this ALD chemistry at 100 ∘C to deposit SnO2. Others have shown that a thin layer of PCBM between SnO2 and the perovskite increases efficiency29. We thermally evaporated 1 nm of LiF and 10 nm of PCBM to leverage their good electron extraction properties (Supplementary Fig. 3), while still achieving high optical transmission. We find that LiF acts as a shunt-blocking layer similar to how thin, insulating, silicon oxide layers have been employed previously in thin-film silicon solar cells to block shunt pathways and increase fill factor (FF)41. We believe that LiF helps enable 1-cm2-aperture-area tandems without a loss in FF and a large spread in efficiency (see Supplementary Fig. 9). Additionally, we note that PCBM thermally decomposes during evaporation to a more thermally stable isomer with very similar electronic properties42.
On top of the PCBM layer, we deposited 4 nm of SnO2 by ALD at 100 ∘C, followed by 2 nm of ZTO. The X-ray photoelectron spectroscopy sputter depth profile of the 4 nm SnO2/2 nm ZTO stack in Supplementary Fig. 4 shows only partial diffusion of zinc into the SnO2 film, indicating that 4 nm of SnO2 is sufficient to prevent detectable concentrations of zinc from reaching the perovskite. ZTO was deposited by combining SnO2 and ZnO ALD processes in a repeating supercycle consisting of three cycles of SnO2 followed by three cycles of ZnO (refs 43,44). The parameters for the individual SnO2 and ZnO processes used in the ZTO supercycle are described in Supplementary Tables 1–4. This process resulted in an effective growth rate of 5.8 Å per supercycle, or 0.1 nm min−1. We investigated faster processing methods of our window layer by reducing the purge time from 30 s to 5 s between pulses. In doing so, the process approached the pulsed-CVD growth regime, further increasing the deposition rate to 0.5 nm min−1, resulting in a total window layer deposition time of approximately 15 min. Current–voltage (J–V) and X-ray photoelectron spectroscopy data in Supplementary Figures 5 and 6 illustrate the identical performance and stoichiometry of SnO2 and ZTO layers deposited via ALD and pulsed-CVD. Pulsed-CVD was used in the fabrication of our champion devices, which is noteworthy as CVD has the potential to reduce processing time compared with ALD and minimize thermal-induced degradation during processing.
A 150-nm-thick ITO electrode with a sheet resistance of 30 Ω per square was sputtered on top of the cell, as in our previous work38. Optical modelling of the device stack indicated that thicker ITO layers introduce significant current losses through parasitic absorption (Supplementary Fig. 7) while thinner layers reduce FF due to high series resistance. The 2 nm of ZTO is necessary to achieve low contact resistance with ITO and reach a high FF, as shown in Supplementary Fig. 3. Finally, we finished the device stack with an evaporated silver metal electrode around the perimeter of the 1-cm2 device area to minimize series resistance and a 150-nm-thick, thermally evaporated LiF anti-reflection coating.
Supplementary Fig. 3 displays the J–V curves of a semi-transparent device on glass compared with a reference opaque device, in which an aluminium electrode was evaporated onto the SnO2/ZTO bilayer instead of sputtering an ITO electrode. The equivalent efficiency of the semi-transparent and opaque devices speaks to the efficacy of the SnO2/ZTO bilayer and sputtered ITO layer as an electron-selective contact. Additionally, the high FF of 78.8% and lack of an extraction barrier, demonstrated by the J–V curve in Fig. 1b, indicate that the bilayer is a successful sputter buffer layer. Figure 1c shows the external quantum efficiency (EQE), transmittance and 1−reflectance measured from the SnO2/ZTO bilayer (front) side. The high EQE, with an integrated current density of 18.7 mA cm−2, and low parasitic losses between 400 and 750 nm, showcase the optical properties of the bilayer and sputtered ITO. The AM1.5G-weighted average transmittance of this device between the perovskite bandgap at 765 nm and the silicon bandgap at 1,200 nm is 74%. Figure 1b indicates that there is still room for open-circuit voltage (VOC) improvement, as the bandgap-voltage offset is over 0.65 V. We believe that the origin of the voltage loss is primarily due to the difficultly in crystallizing the CsFA perovskite in the inverted architecture on a planar surface. Supplementary Fig. 2 reveals considerable surface roughness, which may cause voids in the LiF and PCBM layers during the evaporation.
Two-terminal tandem solar cells
To form two-terminal perovskite/silicon tandem solar cells, perovskite cells were fabricated directly on top of complete silicon bottom cells, as shown in Fig. 2a. The perovskite top cells, one of which is shown in cross-section in Fig. 2c, were identical to their single-junction predecessors, except the NiOx layer was annealed at 190 ∘C for 10 h instead of 300 ∘C for 1 h to prevent appreciable deterioration of the surface passivation layers in the underlying silicon cell (Supplementary Fig. 10). We chose an amorphous silicon/crystalline silicon heterojunction solar cell design for the bottom cell because of its high VOC, which results from the separation of the highly recombination-active (ohmic) contacts from the silicon absorber bulk, and because its dominant performance-loss mechanism under the standard solar spectrum—parasitic absorption of blue light in the front amorphous silicon (a-Si:H) layers—is irrelevant in tandems45.
The silicon cell fabrication process was adjusted to tune the silicon cells to the infrared spectrum that they receive in the tandem, as well as for compatibility with the spin-coated perovskite top cells. In particular, the a-Si:H layers on both sides were slightly thickened to enhance passivation and carrier collection45. A wafer with a chemical–mechanical-polished front surface was used to allow for top-cell spin-coating, but the rear of the wafer was textured to form random pyramids. The pyramids scatter weakly absorbed near-bandgap light, elongating its path length through the wafer and enhancing the cell’s infrared EQE. An excellent rear reflector comprising a silicon nanoparticle (SiNP)/silver stack was also implemented. The SiNP layer, which is atypical in silicon heterojunction solar cells, is used because of its low refractive index—with a porosity of approximately 60%, its refractive index is 1.4—and high transparency at wavelengths longer than 1,000 nm. More details on the use and fabrication of the rear reflector comprising a SiNP/silver stack will be presented in a subsequent publication. Inserting a thick, low-refractive-index layer between the wafer and metal reflector increases the rear internal reflectance by reducing the fraction of light that reaches the lossy metal layer46, and a SiNP/silver reflector has a rear internal reflectance of over 99% (ref. 47). Finally, the front ITO layer was thinned to reduce infrared parasitic absorption since it does not need to play the role of anti-reflection coating in tandems and because, unlike in a single-junction silicon cell, the lateral conductivity of the front electrode need not be high.
In more detail, following the fabrication sequence, an n-type, 280-μm-thick, double-side polished, float-zone silicon wafer was textured only on its rear side in an alkaline solution, resulting in the formation of random pyramids. Intrinsic and p-type a-Si:H films (7 and 15 nm thick, respectively) were first deposited by plasma-enhanced chemical vapour deposition on the textured (rear) side of the wafer, and intrinsic and n-type a-Si:H films (7 and 8 nm thick, respectively) were then deposited on the polished (front) side. A 20-nm-thick, highly transparent ITO layer was next sputtered on the front side through a shadow mask, defining 11 mm × 11 mm square cells, to act as a recombination junction between the silicon and perovskite cells. A 20-nm-thick, highly transparent ITO layer was also deposited over the rear side through the same shadow mask, followed by a 300-nm-thick SiNP layer spray coated through a stainless-steel mesh to define local openings48, and finally, a 200-nm-thick silver layer. Figure 2b shows a plan-view microscope image of the patterned SiNP layer before silver sputtering; the 5% uncoated area allows the silver to make direct electrical contact to the underlying ITO layer (Fig. 2d), whereas the SiNPs in the remaining area (Fig. 2e) enhance infrared conversion efficiency.
On its own, the silicon bottom cell has an efficiency well below 10% because of low FF caused by the high sheet resistance of the thin front ITO layer and lack of metal fingers, and because of low short-circuit current density (JSC) caused by the high reflectance of the planar front surface and lack of appropriate anti-reflection coating. The best 4-cm2 silicon heterojunction solar cell fabricated by the same laboratory with the same—but double-side-textured—wafers, adjusted deposition processes, and screen-printed silver fingers reached a National Renewable Energy Laboratory (NREL)-certified efficiency of 21.4%. A comparable 1-cm2 cell (as in the tandem) is expected to have an efficiency approximately 0.3% lower because of a 10 mV VOC loss from increased edge recombination, and a comparable cell with a planar front surface (as in the tandem) is expected to reach only 19–20%.
Figure 2f displays the J–V characteristic of the champion tandem cell, certified at NREL, with a VOC of 1.65 V, JSC of 18.1 mA cm−2 and FF of 79.0%, resulting in an efficiency of 23.6% with a 1-cm2 aperture area and no hysteresis, as shown in Supplementary Fig. 9. The tandem was held at its maximum power point for over half an hour, under constant illumination, and maintained 23.6% efficiency. Supplementary Fig. 11 shows performance metrics for our final batch of devices without IR reflectors (Voc = 1.64 ± 0.02V, Jsc = 17.5 ± 0.2 mA cm−2, FF = 79.9 ± 1.0%, and η = 22.8 ± 0.4%) and with IR reflectors (Voc = 1.64 ± 0.01V, Jsc = 18.2 ± 0.2 mA cm−2, FF = 78.1 ± 1.0%, and η = 23.3 ± 0.4%). The high performance and narrow statistical distribution for these 1-cm2 cells—which are large-area amongst present perovskite devices—attests to the ability of the pulsed-CVD process to deposit a window layer that prevents pinholes and shunt pathways.
Figure 2g shows the measured total absorbance (1−reflectance) and EQE of both sub-cells in the perovskite/silicon tandem solar cell. The figure has been divided into several (coloured) regions to help visualize the tandem response and loss mechanisms. Integrating the EQE spectra over the AM 1.5G spectrum reveals that the perovskite top cell and silicon bottom cell generate 18.9 mA cm−2 and 18.5 mA cm−2, respectively. We note that the silicon cell EQE exceeds 90% between 800 and 875 nm, which is much higher than the measured transmittance of the single-junction perovskite cell in Fig. 1c. This high EQE results from a thinner ITO electrode (20 nm between the silicon and perovskite in the tandem instead of 170 nm between the perovskite and glass in the single-junction cell) and reduced reflection due to the lack of an air interface in the tandem. Supplementary Figs 9 and 11 illustrate the efficacy of the SiNP rear reflector in increasing infrared absorption within the silicon wafer, corresponding to an increase in JSC of about 1.5 mA cm−2. Two main current losses are front-surface reflection (area above the total absorbance curve) and parasitic absorption (area between the total absorbance and EQE curves), which account for 4.8 mA cm−2 and 4.5 mA cm−2, respectively. To further improve the JSC of the tandem device, the easiest step would be to reduce front-surface reflection. Were it eliminated, the summed JSC would increase by 4.2 mA cm−2. (As parasitic absorption still exists, not all transmitted photons would be converted into electron–hole pairs.) The short-wavelength parasitic absorption loss associated with the first pass through the layers at the front of the solar cell is 1.2 mA cm−2 (0.7 mA cm−2 from the ITO and 0.5 mA cm−2 from the PCBM and SnO2/ZTO bilayer, according to our optical simulations) would be gained as current in the top cell if the parasitic absorption were eliminated. The infrared parasitic absorption, which may occur in any layer in the tandem, appears to be large at 3.3 mA cm−2, but this ‘loss’ is misleading because not all of this current is available to be gained. Eliminating infrared parasitic absorption will result in a JSC gain (in the bottom cell) of less than half that value because—even assuming Lambertian light trapping—much of the light will escape out the front of the cell and contribute to the measured reflectance.
Improved stability of perovskite solar cells
In addition to acting as a highly transparent and conductive electrode, ITO—by virtue of its behaviour as a diffusion barrier—can significantly increase the thermal and environmental stability of a perovskite solar cell by trapping the volatile methylammonium cation38,49. The increased thermal stability of the thermodynamically favourable27 mixed CsFA perovskite compared with the pure methylammonium perovskite26, along with the dense, pinhole-free ALD SnO2/ZTO bilayer, should result in perovskite solar cells with even greater stability than previously reported. We tested the stability of single-junction CsFA mixed perovskite solar cells by operating 0.48-cm2-aperture-area devices at the maximum power point without additional encapsulation under continuous, one-sun-equivalent, visible illumination with a sulfur plasma lamp. The test was performed in ambient conditions with an average room humidity of around 40% and the lamp heating the samples to 35 ∘C. Remarkably, the devices operated with minimal degradation in performance for over 1,000 h of testing, as shown in Fig. 3a. In our previous study, small dust particles in the perovskite resulted in pinholes in the ITO encapsulation, creating a pathway for methylammonium evolution and causing eventual efficiencydegradation38. In the present CsFA devices, however, no such pinhole-based degradation was apparent after 1,000 h of operation, speaking to the efficacy of the conformal ALD process to prevent pinhole formation and to the overall increased stability of the CsFA perovskite.
Although the cell in Fig. 3a had the same efficiency after 1,000 h as at the start of the test, this efficiency was not constant over the testing period. As can be seen in Fig. 3a, the rise in efficiency during the first 400 h corresponds to an increase in voltage (VMPP), suggesting an improvement of the NiO/perovskite interface or increased perovskite crystallinity. VMPP started at only a modest value but the lack of VMPP decay during the test is noteworthy. Falling current density (J MPP) is the culprit for the decrease in efficiency over the last 600 h of the test. The exact cause of this decrease in J MPP is currently being studied, but potential causes are the lack of an edge seal or pinholes in the ITO layer caused by dust particles; either case would lead to evolution of the organic cation. However, both of these potential issues can be solved through proper device encapsulation. The vast majority of commercial silicon solar modules are encapsulated with the elastomeric polymer ethylene-vinyl acetate (EVA) and a glass cover sheet to prevent oxidation and moisture ingress, and thus to enable >25-year lifetimes. Lamination of EVA is typically performed at 110–150 ∘C for 30 min under mild vacuum. The increased thermal stability38 of our perovskite devices with the sputtered ITO electrode enables us to compare the stability of our devices directly with conventional silicon modules by packaging our devices using this industry-standard encapsulation process. We laminated single-junction perovskite devices between two sheets of glass with EVA at a curing temperature of 140 ∘C for 20 min. A butyl rubber edge seal was used to prevent moisture ingress.
To test the efficacy of this packaging, we performed the damp heat test described in the International Electrotechnical Commission (IEC) design qualification testing protocol 61215 for ‘Crystalline Silicon Terrestrial Photovoltaic (PV) Modules’. These are accelerated lifetime tests with the goal of rigorously testing modules for the same failure mechanisms observed in the field in a much shorter time. The damp heat test requires that the module withstand 85 ∘C and 85% relative humidity for 1,000 h with no more than 10% degradation in performance. We performed this damp heat test on two packaged perovskite devices over the course of 6 weeks (1,008 h). The devices were taken out of the dark damp heat chamber once a week and measured with a maximum-power-tracking program until the efficiency stabilized. Figure 3b shows the voltage, current and efficiency at maximum power each week. Not only do the devices pass the damp heat test, they improve over the course of the test. While the efficiency of the devices is initially limited by poor FF, VMPP increases throughout the test, similar to under continuous illumination (Fig. 3a). However, unlike in the continuous-illumination study, J MPP remains constant throughout the course of the damp heat test, indicating that the packaging successfully addressed potential problems such as pinholes in the ITO and an improper edge seal.
An ALD- or pulsed-CVD-processed SnO2/ZTO window layer has enabled the successful fabrication of perovskite solar cells with high efficiency and improved stability. These vapour processes produce a compact, conformal, uniform and highly transparent SnO2/ZTO bilayer with efficient hole-blocking ability and sputter buffer layer properties, allowing for 1-cm2 devices with no pinholes. These devices have the thermal and ambient stability to be further sealed with industry-standard encapsulation such as EVA and glass. In addition to being made as single-junction devices on glass, the same devices were fabricated on silicon solar cells with planar front surfaces to form two-terminal tandems. When the perovskite cells were coupled with silicon heterojunction bottom cells with an excellent rear reflector and a-Si:H and ITO layers adjusted for the exclusively infrared spectrum, the resulting tandem reached an efficiency of 23.6% with no hysteresis and stable maximum power over more than 30 min under illumination. This efficiency is well beyond that of both sub-cells, beyond that of the record single-junction perovskite cell, and approaching that of the record single-junction silicon cell. Performance-loss simulations suggest that the efficiency can be increased further by widening the bandgap of the perovskite and reducing front-surface reflection, which will enable both higher matched current densities and higher voltage. Perovskite/silicon tandems with an ALD SnO2/ZTO-bilayer layer present a promising method to achieving industry-standard operational lifetimes with pathways to raising efficiencies over 30% (ref. 19).
Perovskite device fabrication.
Semi-transparent perovskite devices were fabricated on patterned, 10 Ω per square glass from Xin Yan Technology. After cleaning with Extran, acetone and isopropanol, the ITO glass was UV ozone cleaned for 15 min. A 1 M solution of nickel nitrate hexahydrate (Sigma-Aldrich, puriss) and ethylenediamine (Sigma-Aldrich) in anhydrous ethylene glycol (Sigma-Aldrich) was spun on ITO-coated glass at 5,000 r.p.m. for 50 s and annealed at 300 ∘C for 1 h. The NiOx films were quickly taken into a dry air box where the CsFA perovskite was deposited from a stoichiometric solution containing CsI (Sigma-Aldrich, 99.99% trace metals), formamidinium iodide (Dyesol), PbI2 (TCI) and PbBr2 (Sigma-Aldrich, 96%) in a mixture of N,N-dimethylformamide (Sigma-Aldrich) and dimethyl sulfoxide (Sigma-Aldrich). The solution was deposited through a 0.2 μm PTFE filter and spun at 1,000 r.p.m. for 11 s, followed by 6,000 r.p.m. for 30 s. During spin-coating, chlorobenzene was quickly dispensed 5 s prior to the end of the spin process as an antisolvent to assist perovskite crystallization. The films were annealed on a hot plate at 50 ∘C for 1 min and then annealed at 100 ∘C for 30 min. This deposition method was adapted from the literature27. Next, we thermally evaporated 1 nm of LiF and a thin 10 nm layer of PCBM. Then, we deposited 4 nm of stoichiometric SnO2 with pulsed-CVD at 100 ∘C on top of the PCBM, followed by 2 nm of zinc tin oxide. Tin oxide and zinc oxide pulsed-CVD processes were developed on an Arradiance GEMStar-6 ALD system at 100 ∘C. The SnO2 pulsed-CVD cycle consisted of the processing sequence: 5 s purge (30 sccm N2), 1.5 s TDMASn pulse (30 sccm N2), 5 s purge (90 sccm N2), 1 s deionized water pulse (90 sccm N2) and 5 s of purging (90 sccm N2) (5 s/1.5 s/5 s/1 s/5 s). The door and body temperature was maintained at 100 ∘C for the hot-wall reactor while the manifold temperature was 115 ∘C with a precursor temperature of 60 ∘C. Pulsed-CVD of zinc oxide was grown at 100 ∘C using diethyl zinc and water with the processing sequence: 100 ms/5 s/1 s/5 s with a constant 90 sccm N2 flow. The reactor temperatures were the same as the tin oxide process, but the diethyl zinc precursor was unheated. Note that ALD can be performed instead of pulsed-CVD above. See Supplementary Tables 1–4 for details of the ALD and pulsed-CVD process parameters. For the semi-transparent and monolithic tandem devices, 150 nm of ITO was deposited through d.c. sputtering. The sputter deposition of ITO films in the work was performed as previously described38. An ITO witness sample on glass has a mobility of 43 cm2 V−1 s−1 and a carrier concentration of 3.5 × 1020 cm−3. We finished the device stack with an evaporated or sputtered silver metal electrode around the perimeter of the 1 cm2 device area to minimize series resistance and subsequently evaporated 150 nm of LiF as a second anti-reflection coating. For the damp heat stability testing, the single-junction solar cells were packaged between top and bottom EVA encapsulants and two sheets of 3-mm-thick glass. The butyl rubber edge seal was placed as a frame on the outer edge of the glass during assembly. The package got pressed with 1,000 mbar pressure at 140 ∘C for 20 min for the edge seal to soften and the encapsulant to cure.
Silicon device fabrication.
An n-type, 280-μm-thick, double-side polished, float-zone wafer was used as the starting substrate. A 250-nm-thick silicon nitride layer was deposited by plasma-enhanced CVD in an AMAT P5000 tool on one side of the wafer as a protective coating, and the wafer was then textured on the uncoated side in potassium hydroxide to reveal random pyramids. After removing the nitride coating in diluted hydrofluoric acid, the wafer was cleaned in piranha and RCA-B solutions, and the oxide was removed in buffered oxide etchant prior to deposition of amorphous silicon (a-Si:H) layers. Intrinsic and p-type a-Si:H films (7 and 15 nm thick, respectively) were first deposited by plasma-enhanced CVD on the textured (rear) side of the wafer, and intrinsic and n-type a-Si:H films (7 and 8 nm thick, respectively) were then deposited on the polished (front) side. A 20-nm-thick indium tin oxide (ITO) layer was sputtered from a 90/10 In2O3/SnO2 in an MRC 944 tool on the polished side of the wafer through a shadow mask to define square cells 11 mm on a side. A 20-nm-thick ITO layer was also sputtered over the textured surface through the same shadow mask. The front ITO layer was deposited using a 2.3:100 oxygen/argon mixture, which results in films with electron densities and mobilities of approximately 5 × 1020 cm−3 and 25 cm2 V−1 s−1, respectively after annealing at 200 ∘C; in contrast, the rear ITO layer was deposited using a 4.1:100 oxygen/argon mixture, which results in films with electron densities and mobilities of approximately 2 × 1020 cm−3 and 25 cm2 V−1 s−1, respectively, after annealing at 200 ∘C. The textured surface was subsequently coated with a 300-nm-thick silicon nanoparticle layer that was spray-coated through a stainless-steel mesh (in contact with the wafer) to define local openings occupying approximately 5% of the total area. The nanoparticles were synthesized and deposited in a custom tool that uses a flow-through plasma process to nucleate nanoparticles from silane gas and deposit them via acceleration through a nozzle toward a substrate. The wafer was next annealed at 200 ∘C for 20 min to partially oxidize the nanoparticles, and a 200-nm-thick silver layer was sputtered through the shadow mask to cover the textured surface, finishing the cell.
Current–voltage measurements were performed using a Keithley model 2400 digital source meter. A 300 W xenon lamp (Oriel) solar simulator was used to irradiate semi-transparent devices from the bottom glass side. To irradiate tandems and semi-transparent devices from the top, an Oriel Sol3A solar simulator was used. To negate spectral mismatch between our reference KG5 diode and the response of the perovskite and silicon solar cells, the lamp was calibrated to match the integrated photocurrent calculated by EQE. For the semi-transparent devices, the J–V curves were measured from forward to reverse bias with a 0.1 V s−1 scan rate. The semi-transparent devices were initially tested using a maximum-power-tracking program that is a perturb-and-measure program with voltage steps of 5 mV. Once the device efficiency has stabilized for at least 10 min, a J–V scan is taken. For the monolithic tandem devices, both forward-to-reverse and reverse-to-forward scans were measured at a rate of 0.12 V s−1. Reported values for efficiency were all evaluated on the basis of steady maximum-power-point operation for a minimum of a minute. The opaque cells and semi-transparent cells were illuminated through 0.12 and 0.39 cm2 aperture areas, respectively. The perovskite/silicon tandems all had an aperture area of 1 cm2. The EQE was recorded as a function of the wavelength using a Keithley model 236. A 100 W tungsten lamp (Newport) was used as the excitation source and focused through a Princeton Instruments SpectraPro 150 monochromator. The monochromatic light was chopped at around 73 Hz and Stanford Research Systems SR830 model lock-ins were used to monitor the perovskite signal at the chopping frequency. Data were averaged for 5 s at each wavelength. Each individual sub-cell in the tandem must be electrically isolated to obtain an EQE spectrum. We light-biased the silicon sub-cell with a 980 nm laser diode from ThorLabs and the perovskite sub-cell with a white-light LED array to measure the EQE of the perovskite and silicon sub-cells, respectively. No white-light bias was used during the EQE measurement of the single-junction perovskite devices. To measure the unpackaged stability under continuous illumination, devices were tested under a sulfur plasma lamp from LG (6,000 K blackbody). The device is monitored at maximum power point using electronics from Science Wares Inc. The surface temperature of the devices during the test is 35 ∘C, as measured with a temperature probe. The damp heat devices were placed in an 85 ∘C and 85% relative humidity chamber and were taken out every week for performance measurements taken at room temperature. These devices were tested under one sun on an Oriel Sol3A solar simulator. A maximum power point tracking program was written in LABVIEW to measure stable device performance.
The data that support the plots within this paper and other findings of this study are available from the corresponding author on request.
How to cite this article: Bush, K A. et al. 23.6%-efficient monolithic perovskite/silicon tandem solar cells with improved stability. Nat. Energy 2, 17009 (2017).
The authors thank M. Leilaeioun and K. Fisher for assistance with silicon cell fabrication and simulation. The information, data and work presentedherein were funded in part by the US Department of Energy (DOE) Sunshot NextGen III program under award number DE-EE0006707, the National Science Foundation (NSF) and Department of Energy under NSF Cooperative Agreement No. EEC-1041895, the Research Corporation for Science Advancement through Scialog Collaborative Innovation Award Number 23460, and the National Research Foundation Singapore through the Singapore MIT Alliance for Research and Technology’s Low Energy Electronic Systems research programme. K.A.B. is supported by the NSF Graduate Research Fellowship Program under Grant No. DGE-114747. The optical measurements were performed in part at the Stanford Nanofabrication Facility’s nSiL laboratory, which is funded by NSF award ARI-0963061. AFM and SEM were performed at the Stanford Nano Shared Facilities (SNSF). We appreciate those who provided supplies for device encapsulation: J. Kapur (Dupont) for Surlyn, L. Postak (Quanex) for Solargain edge tape, T. Orfley (Corning) for eagle glass, and S. Ebers and S. Lee (Ulbrich Solar Technologies) for bus ribbon.
Supplementary Tables 1–4, Supplementary Figures 1–11, Supplementary References.