Waveguide-coupled nanopillar metal-cavity light-emitting diodes on silicon

Nanoscale light sources using metal cavities have been proposed to enable high integration density, efficient operation at low energy per bit and ultra-fast modulation, which would make them attractive for future low-power optical interconnects. For this application, such devices are required to be efficient, waveguide-coupled and integrated on a silicon substrate. We demonstrate a metal-cavity light-emitting diode coupled to a waveguide on silicon. The cavity consists of a metal-coated III–V semiconductor nanopillar which funnels a large fraction of spontaneous emission into the fundamental mode of an InP waveguide bonded to a silicon wafer showing full compatibility with membrane-on-Si photonic integration platforms. The device was characterized through a grating coupler and shows on-chip external quantum efficiency in the 10−4–10−2 range at tens of microamp current injection levels, which greatly exceeds the performance of any waveguide-coupled nanoscale light source integrated on silicon in this current range. Furthermore, direct modulation experiments reveal sub-nanosecond electro-optical response with the potential for multi gigabit per second modulation speeds.


Supplementary Note 1: Modeling of grating coupler
Left: chip-to-free space coupling efficiency. Right: angle at which the intensity of the diffracted optical distribution is maximum.

Supplementary Note 2: Device fabrication
The fabrication process required a variety of techniques, such as optical and electron beam lithography (EBL), plasma-enhanced chemical vapor deposition (PECVD) of dielectrics, reactive ion etching (RIE) processes, wet-chemical etching, thermal and electron-beam evaporation of metals, rapid thermal annealing, etc. The definition of the pillar, waveguide and grating coupler is carried out by EBL in three different steps and the rest of the process is done by optical lithography. EBL was used in order to circumvent the limited resolution of optical lithography systems in our facilities, but our nano-LED devices could be developed using other lithographic methods widely employed in photonics, namely deep UV lithography 1 .
An overview of the fabrication process flow to fabricate metal-coated nanopillars on top of waveguides, which are connected to grating couplers, in III-V membranes bonded to a silicon substrate is presented in Supplementary Figure 2:. The use of the benzocyclobutene (BCB) 2 bonding layer allows an InP-waveguide with high refractive index contrast (resulting in a compact cross section) which facilitates the coupling with the nanocavity mode with high confinement.
In the following, the process flow is described in 10 stages which are depicted in Supplementary   5. The next step is to fabricate the grating coupler. For this, a Si3N4 layer is deposited with PECVD and then ZEP520A resist is spun. The resist is e-beam patterned and developed with n-Amyl Acetaat; then, the pattern is transferred into the Si3N4 hardmask with a CHF3 based RIE. 6. In order to protect the nanopillar during the grating etching into the semiconductor, an optical lithography is carried out using again an AZ4533 resist and the MaD531S developer (see Supplementary Figure 4

Supplementary Note 3: Time-resolved experiments on nanopillars
In order to confirm that non-radiative recombination is indeed the main process involved in the sub-nanosecond carrier lifetimes shown in Fig. 4a, we performed a systematic study of the carrier dynamics in single InP-InGaAs-InP nanopillars with varying cross section, using micro photoluminescence (PL) spectroscopy and time-resolved PL spectroscopy. Supplementary

Supplementary Note 5: Nano-LED L-I characteristics
As the cavity resonance frequency is very sensitive to nanopillar size, we fabricated a series of devices with different symmetric cross sections ranging between 300 nm × 300 nm and 400 nm × 400 nm. The tested nanocavities (we tested devices ranging from 300 nm × 300 nm to 350 nm where () L  is the homogeneous broadening lineshape, ()  the density of photon states, H the dipole-field interaction Hamiltonian and i,f the initial and final states of the dipole transition.
The lineshapes for the cavity and the emitter are both typically given by Lorentzians.
Considering an electric dipole transition and a quasi-single-mode emission, the matrix element for the spontaneous emission of a photon is given by: where       where d is the dipole operator, and u(l)  is the upper (lower) level wave function of the atom.
In the case of a dielectric cavity, V is given by the energy normalization condition         From Eq. (2), the spontaneous emission rate of an emitter placed at the peak of the electric field, spectrally narrower than the cavity and resonant with it, can be derived as a special case.
where cav  is the cavity frequency. In Eq. (7) we verify that, apart from other parameters, only the 1/V dependence appears in the spontaneous emission term, which comes directly from the dependence of the spontaneous emission rate on the vacuum field (also appearing in the Purcell factor equation).
In the case of a bulk semiconductor active medium, the inhomogeneous broadening of the electronic states must be described by integrating Eq. (2) over the bands. In the limit emcav, the spontaneous emission rate per unit time and volume, sp,cav () rn , becomes:  µm 3 , and this value was used in the numerical simulation results presented here. We note that for the case of our nanocavity, which is not sub-wavelength in all three directions, most of the mode is confined in the semiconductor, so that the kinetic energy in the metal was neglected in the calculations of the effective mode volume. In the case of metal-clad cavities that are sub-wavelength in all three directions, the kinetic energy can be included in the calculations of the effective mode volume, as thoroughly discussed e.g. in the work of Khurgin and Sun 9 . As described in Eqs. (9) and (10) Alternatives to our design that could make substantial improvements in the emitter-cavity overlap include developments of ultrathin III-V active layers in buried heterostructures 11 or nanoscale metallic coaxial devices composed by a metallic rod surrounded by a metal-coated semiconductor ring 12 .
In the fitting of the L-I characteristic at low temperature in Fig. 3b Table 2) were either kept the same as for the low-temperature fitting (effective masses and quantum efficiencies), or taken from literature (energy bandgap), or from the experimental data (cavity frequency and quality factor).
Finally, for the devices used in the modulation experiments in Fig 4a, the same procedure was used to fit the corresponding modulation properties and L-I characteristic at room temperature.

Simulation results and discussion of efficiency and modulation speed
We performed a systematic study to investigate the effects of the reduction of the surface recombination and the influence of the emitter-cavity spatial overlap and the reduction of the mode volume of the cavity in the performance of the nano-LED in terms of efficiency and modulation speed. In the Supplementary Fig. 9 we summarize the results of our findings that can be described as follows.
First, by assuming a reduction of the surface recombination (we employed the value of surface velocity 500 cm/s achieved recently in our work using an improved passivation method, see 14 ) we observe a substantial improvement of the predicted efficiency of the nano-LEDs. The results demonstrate the possibility of achieving up to 100-fold increase of the output power at low injection currents, as seen in the red dashed curve in Supplementary Fig. 9a. However, the output power starts to saturate at higher injection current levels (>20 µA) due to the Auger recombination effect. While this has an effect in the reduction of the output power, it enhances the 3 dB bandwidth to close to 1 GHz, well beyond the radiative recombination limit (red curve in Supplementary Fig. 9b.
Further improvements of the output power and speed without compromising the efficiency can be achieved assuming the case of a nanocavity with physical dimensions smaller than our current devices. This corresponds to the Purcell enhanced regime via reduction of the effective mode volume of the nanocavity. In order to model this, we assumed corresponding to a reduction of the mode volume of about ten times the design values for our nano-LED device (corresponding to almost three-times reduction in the lateral dimension). This value is similar to the smallest mode volumes reported in the literature of comparable metaldielectric nanocavity devices (see, e.g. 15 ). Since in the situation considered at least in one direction the cavity is still larger than c ra /2n  , calculations of the relative fraction of magnetic energy show that more energy is stored in the magnetic field than in the motion of electrons in the metal, 9 and therefore the mode volume definition in Eq. (6) is still valid. We also assumed the ideal case of a perfect emitter-cavity spatial overlap resulting in a,eff VV  , a surface velocity of 500 cm/s, and a realistic room temperature Auger coefficient value (see Supplementary Table   2). In this Purcell enhanced regime with improved surface passivation, on-chip output powers above 1 µW can be predicted (assuming =1), as shown in the blue dashed-dot color curve in Supplementary Fig 9a. The modulation speed is also substantially improved without compromising the efficiency. As shown in the blue curve of Supplementary Fig. 9b, speeds higher than 1 GHz are expected for injection levels above 30 µA. This means that Purcellenhanced metal cavity nano-LED devices with improved surface passivation can potentially operate at room temperature at ~1 Gb/s rate with on-chip optical power levels above 1 µW (corresponding to ~10 4 photons/bit) and with energy consumptions <20 fJ/bit (operation at 10 µA and assuming a voltage drop of 1.4 V for the case of improved ohmic contacts). If we operate the nano-LED slightly below 1 µW output power, that is, in the current range of 1-4 µA, the corresponding energy consumption is 8 to 10.2 fJ/bit, respectively, and therefore in the range required by on-chip optical interconnects (i.e. <10 fJ/bit). Although further improvements of the bandwidth and energy consumption per bit are predicted by further downscaling of the nano-LED, reducing the dimensions of the nanopillars is technologically challenging without considering changes in the current design (alternative designs can be found in 11 and 12 ). Practical issues include an increased difficulty to obtain straight sidewall angles due to a strong mask erosion in the high aspect ratio hardmask needed to deeply etch pillars with small cross section (see Supplementary Fig. 3a). Additionally, the nanopillars might be under a large stress if the thickness of the metal cladding is significantly larger than the nanopillar diameter.

High-speed switch-off beyond the limitation of the recombination rates
Further speed increase was achieved by operating our nano-LED under low bias to achieve a full turn-off cycle of the modulation enabling a fast sweep-out of carriers from the InGaAs active region in the nanopillars. Supplementary Fig. 11 shows a fast switch-off of around 123 ps at room temperature, a value beyond the limitation of the recombination rates. The exploitation of this ultrafast switch-off transient can already provide multi-GHz operation of the current nano-LEDs without requiring implementing other physical processes such as Purcell enhancement of the spontaneous emission rate. Although the switch-on time of our nanoLEDs is still limited by the carrier lifetimes, this can be reduced by using the current peaking techniques reported recently in 16 and 17 . Such type of techniques could potentially be implemented in our nanoLEDs using on-chip driving electronics hosted in the Si-substrate as enabled by the IMOS platform.
Supplementary Figure 11: Electro-optical response of nanopillar LED at low bias conditions. Time-resolved electroluminescence revealing ~123 ps switch-off of the nanopillar LED operating at room-temperature using modulation of electrical pulses with widths of 100 ps and a bias current of 3.13 µA. Also shown is the instrument response function (IRF) curve of our measurement setup.