Abstract
The use of threedimensional topological insulators for disruptive technologies critically depends on the dissipationless transport of electrons at the surface, because of the suppression of backscattering at defects. However, in real devices, defects are unavoidable and scattering at angles other than 180° is allowed for such materials. Until now, this has been studied indirectly by bulk measurements and by the analysis of the local density of states in close vicinity to defect sites. Here, we directly measure the nanoscale voltage drop caused by the scattering at step edges, which occurs if a lateral current flows along a threedimensional topological insulator. The experiments were performed using scanning tunnelling potentiometry for thin Bi_{2}Se_{3} films. So far, the observed voltage drops are small because of large contributions of the bulk to the electronic transport. However, for the use of ideal topological insulating thin films in devices, these contributions would play a significant role.
Introduction
Both, the high conductivity and the spin polarization of the topological surface state imply the use of threedimensional topological insulators (3D TIs)^{1,2} for spintronic devices (for example, for data processing). In addition, the lowenergy dissipation due to the forbidden backscattering^{3,4,5,6} increases the efficiency and the lifetime of potential TIbased devices. Bi_{2}Se_{3} is such a 3D TI with a bulk band gap of about 0.3 eV while the corresponding topological surface state is found to exhibit a nearly ideal Dirac cone^{7}. The height of the band gap suppresses intrinsic conduction, so that Bi_{2}Se_{3} is well suited for possible technical applications. In addition, the doping of Bi_{2}Se_{3} can be tailored by lowlevel substitutions of Ca for Bi to adjust the Fermi level^{8}. However, owing to unintentional doping by Se defects, the bulk of thin Bi_{2}Se_{3} films is conductive. So far, the global sheet conductance of Bi_{2}Se_{3} for different sample preparations has been studied on a macroscopic scale^{9,10,11,12}. The microscopic scattering in (topological) surface states is mostly analysed by evaluating the lateral variation of the local density of states (LDOSs) using dI/dV measurements with a scanning tunnelling microscope (STM)^{3,4,5,13}. Here, electron scattering at defects, for example, surface step edges is measured indirectly by analysing the lateral oscillations of the LDOS near the scattering centre. As this technique provides a high spatial resolution on the atomic scale^{14}, the involved scattering channels are analysed with great spatial resolution^{6,15,16,17}. This has also been supported by theoretical studies^{15,16,18,19}, which proved that scattering at step edges on a topological surface is possible without violating the forbidden backscattering, decreasing the electron transport. Very recently, abinitio calculations reveal the impact of Bi_{2}Se_{3} step edges, that is, surface barriers on the electron transport^{19}. For TIbased devices, local information on the electron transport through thin TI films on supporting substrates are relevant as processed device structures have reached dimensions of ∼14 nm already. For a 3D TI holding a surface current, the spatial variation of the electrochemical potential μ_{ec} at the surface carries direct and detailed information on the electron transport properties and the corresponding energy dissipation^{20}. Datta shows that a local scatterer such as a step edge represents a onedimensional Landauerlike resistive dipole, which results in a local drop of μ_{ec}, that is, a local voltage drop at the defect site^{20}. At the surface of a TI this has not been measured so far.
In the following, we use scanning tunnelling potentiometry (STP)^{21,22} to detect simultaneously μ_{ec} and the corresponding topography at the surface of the 3D TI Bi_{2}Se_{3} with atomicscale resolution. The analysis of μ_{ec} at the thin Bi_{2}Se_{3} film surface yields a direct measure of current transport under realistic conditions, that is, a current of a few mA flows parallel to the surface analogue to real devices. We use thin films of Bi_{2}Se_{3} on the technologically important substrate silicon with a film thickness of 14 QL, which ensures that the topological state is well established^{23}, whereas the surfacetobulk ratio of the film is still very high. This guarantees a maximum surface sensitivity. In particular, we find that the nanoscale electron transport in Bi_{2}Se_{3} thin films is sensitive to surface step edges, manifested in local voltage drops at the step edge positions.
Results
Sample characterisation by macroscale transport measurements
A sketch of the experimental setup and a SEM image of the contact geometry are shown in Fig. 1a,b. For further experimental details see the Methods. Figure 1c shows a typical STM image of the thin Bi_{2}Se_{3} film. It reveals a layered structure with a step height for 1 QL of 1.01±0.07 nm (see also Fig. 2d) in agreement with other published data for Bi_{2}Se_{3} (ref. 24). The inset in Fig. 1c shows the corresponding sharp and hexagonal lowenergy electron diffraction (LEED) pattern indicating a high quality of the epitaxial film with a lateral lattice constant of 0.41±0.01 nm. Using a multi probe STM, we evaluate the macroscopic conductance of the sample in situ: Two tips contact the Bi_{2}Se_{3} surface for different tip distances and the resistance between the tips is measured (inset Fig. 1d). Fitting of the data yields a (macroscopic) sheet conductance G_{macro} of the film of 1.8±0.1 mS (Fig. 1d), which agrees to the findings by other groups (for example, 1.3 mS for 10 QL Bi_{2}Se_{3} on sapphire (0001), extracted from the diagram in ref. 25). This is discussed in detail in Supplementary Note 1 (see also Supplementary Fig. 1).
Nanoscale transport measurements by STP
Figure 2 shows our experimental STP results, that is, an STM topography (Fig. 2a) and a simultaneously acquired map of the electrochemical potential (for short now called potential; Fig. 2b). Here, a lateral current of 1.9 mA is flowing through the sample from right to left (direction of the electrons). The potential mainly exhibits a constant gradient along this direction (Fig. 2c and line profile in Fig. 2e), which corresponds to an electric field E of 72±4 V cm^{−1}. This constant gradient may result from phonon scattering as the dominant process within the Bi_{2}Se_{2} film, which is not forbidden by the topological phase^{26,27}.
For the given geometry, the average local current density j in the middle between the contacting tips can be estimated from the total transverse current I_{trans} by^{28}
where d is the distance between the contact tips (for details see Supplementary Note 2 and Supplementary Fig. 2). Given the transverse current of I_{trans}=1.9 mA and the distance between the contacting tips of d=80±20 μm (see Fig. 1b for details), the average local current density is j=0.15±0.03 A cm^{−1}. Using Ohm’s law, we calculate the local (microscopic) sheet conductance G_{micro} of the film: G_{micro}=j/E=2.1±0.6 mS, which is close to the global film conductance of G_{macro}=1.8±0.1 mS as determined from the resistance measurement at macroscopic distances (see Fig. 1d for details). This implies a rather homogeneous sheet conductance of the Bi_{2}Se_{3} film. The sheet conductance G of a film is defined as the sum of the film’s bulk conductivity σ_{b} times the film thickness d and the surface contribution σ_{s}:
From literature^{9,10,12}, we know that the surface conductivity of highquality Bi_{2}Se_{3} films is in the range of 0.4–0.8 mS. Thus, the dominating part (60–80%) for the microscopic conductance of our Bi_{2}Se_{3} film is the bulk conductivity. This is plausible since during the film growth the Se excess was not very high (around 50% more Se atoms than necessary) and Se vacancies are incorporated into the film leading to an ndoping^{8,9}. In consequence, around 30% of the current density flows through the surface state.
To analyse the local potential in detail, we subtract the macroscopic gradient from the measured potential and an additional ‘fine structure’ in the potential becomes visible (Fig. 2c and line profile in Fig. 2d). This ‘fine structure’ exhibits small voltage drops in the order of 20–30 μV, which are directly correlated to step edges in the topography (see Fig. 2a,b for details). To emphasise this, Fig. 2d shows line profiles across the same region for the topographic image, the potential image and the ‘fine structure’. In addition, we show the line profile for the ‘fine structure’ for both, forward and backward scan direction. As the potential for both scan directions agree well, we can rule out a measurement artefact due to a nonideal operating feedback loop for the tunnelling current.
Excluding tip induced artefacts in the STP measurements
However, a drop in the measured potential may be caused by the geometry of the tip (that is, a double tip as discussed, for example, by ref. 21): In this case, the tunnelling junction is laterally displaced, leading to a voltage drop ΔV of the potential given by E·d with the electric field E and the distance d for the double tip. For the given values of E and ΔV, the distance would be ∼7 nm. Hence, the deviation of the constant gradient of the potential should be limited to a range of ∼7 nm. However, we find that the change of the potential at a step edge remains for distances in the order of 100 nm or more. This has been further corroborated by a numerical simulation taking care of different tip geometries and the measured topography. Here, it is worth noting, that the measured STP signals at the Bi_{2}Se_{3} step edges are very small, reaching the limits of the STP measurement. Similar signals observed for the graphene surface (see ref. 28 for details) and the Si(111)(3 × 3)R30°Ag surface^{29} are a magnitude higher (mV scale) than in our case (μV scale). Therefore, great care was taken to exclude artefacts. For a detailed discussion, see the Supplementary Note 3 inclusive Supplementary Figs 3 and 4.
Such a sharp voltage drop at a surface step edge is only observed in STP, if the underlying scattering event is located extremely close to the surface (M. Wenderoth and R. Möller, personal communication). Thus, the observed small voltage drops at surface step edges of Bi_{2}Se_{3} clearly reveal that significant surface contributions are measured by our STP experiment and we conclude that a significant charge transport is mediated through the TI surface at room temperature.
Detailed STP analysis at a 1 QL step
To analyse the voltage drop at a 1 QL step in more detail, Fig. 3a shows averaged line profiles of the potential across a 1 QL Bi_{2}Se_{3} step for different surface current densities. The values of the observed voltage drops at the step edge are stated at each line profile. To improve the signal to noise ratio, we average the data for several scan lines (see also the Supplementary Note 4 and Supplementary Figs 5 and 6). By evaluating the voltage drop at the single QL step edge as a function of the surface current density (j_{s}=−70 mA cm^{−1}…+70 mA cm^{−1}, Fig. 3b) we can deduce the conductivity at a QL step edge. As expected, for the low surfacecurrent densities, the amplitude of the voltage drop scales linearly as a function of the surface current density. Now we compare an average local voltage drop of 30 μV with the observed gradient for a length of 100 nm, which is equivalent to a voltage difference of 720 μV. Using the fact that 30% of the current density flows through the surface state^{9,10,12}, we estimate a voltage difference for a nominal length of 100 nm caused by phonon scattering to 210 μV for a pure surface conduction. Thus, the voltage drop at the step edge accounts to 15% for a length of 100 nm, which is a significant contribution to the surface state conductivity and will be even higher for an increased step edge density. Similar to the evaluation of the step conductivity induced by a substrate step of graphene on SiC in ref. 28, we determine the step conductivity of a 1 QL Bi_{2}Se_{3} step from the slope of the fit to a numerical value of σ_{step}=j_{s}/ΔV=1,100±700 S cm^{−1} (Fig. 3b). The main factors for the uncertainties for the step conductivity are the measured distances between the two contact tips (25%) and the estimation of the portion of transvers current, which flows through the surface state (33%). Other error sources like the uncertainties in the measurement of the transverse current and in the measurements of the voltage drops are less important (some %). This leads to a total relative error of the step conductivity of ∼60%. From other STP data on Bi_{2}Se_{3} (see Supplementary Note 5 and Supplementary Fig. 7), we can also make a rough estimation of the step conductivity of a 3 QL step to a numerical value of about 400 S cm^{−1}. The impact of surface step edges to the lateral film conductance was also verified by macroscopic 4 point probe measurements. Here, we used a Bi_{2}Se_{3} film with an anisotropic step distribution and find that the conductance of the film is also anisotropic. The resulting evaluation of the step edge conductivity from those macroscopic measurements yields a value of 1,000 S cm^{−1} for the step conductivity of the Bi_{2}S_{3} steps in great agreement with the STP measurements. For more details, see the Supplementary Note 6 and Supplementary Figs 8–10.
Discussion
The observed voltage drops demonstrate that the step edges are nanoresistances, which scatter the conduction electrons locally. This scattering process can be described as a reflection and transmission of incoming electron waves at the step edge, which does not contradict to the properties of a TI. Very recent abinitio calculations by Narayan et al.^{19} show that Bi_{2}Se_{3} step edges are barriers for the electron transport, which is consistent with our STP results. The direct backscattering (180°) is still forbidden, but other scattering channels (angles) are possible as discussed by Biswas and Balatzky^{15}. This was already observed indirectly by dI/dV imaging, for example, on Bi_{1x}Sb_{x} by Roushan et al.^{4}, on the Bi_{2}Te_{3} surface by Alpichshev et al.^{5} and on the Bi_{2}Se_{3} surface by Wang et al.^{6} Depending on the electron energy, the phase and the spin texture, the scattered electron waves interfere at the step edge with the incoming or transmitted electron waves resulting in oscillations of the LDOS near the step edge^{14,16}, which diminish faster (power of −3/2) than for trivial two dimensional electron gas systems (power of −1/2) (ref. 6). Although direct backscattering for the surface state is not allowed, other non180° scattering channels are available at the step edge, which limit the resulting conductivity of the Bi_{2}Se_{3} surface. Here, it is worth noting that we cannot clearly distinguish if the scattering happens exclusively within the TI’s surface state or if bulk states^{30} also participate in the scattering process. Epitaxial Bi_{2}Se_{3} films are known to exhibit a ndoping because of Se vacancies, leading to a shift of the Fermi energy towards the valence band. At a high doping level, this would lead to an increased involvement of the bulk states in the scattering process. In realistic thinfilm devices, such effects are also of technological relevance. Overall, our experimental results reveal that electron scattering also affects the local potential near a surface step edge of the 3D TI Bi_{2}Se_{3} if a current is flowing through the surface. This is the first direct evidence for the relation between LDOS oscillations and local voltage drops at defect sites on TI surfaces.
Table 1 gives an overview on the step conductivities including other lowdimensional surface systems. The step conductivity of a 1QL Bi_{2}Se_{3} step (height of ca 1 nm) is similar to a SiC substrate step for a graphene layer^{28} (height of 0.5 nm). If we compare steps of the same step height (graphene on a SiC double step versus 1 QL Bi_{2}Se_{3} step), the step conductivity of Bi_{2}Se_{3} appears enhanced. This means that the impact of the step edge scattering in the case of Bi_{2}Se_{3} thin films is reduced as compared with a substratesupported graphene sheet. In comparison to, for example, a single step of the Si(111)(3 × 3)R30°Ag (ref. 29) surface (height of 0.3 nm), the step conductivity of a 1QL Bi_{2}Se_{3} step appears 35 times higher. This implies that the overlap of the surface states on the upper and the lower terrace at the Bi_{2}Se_{3} step edge is quite high. This is reasonable as the penetration depth of the surface state extents about 3 QL (ref. 23).
In conclusion, voltage drops at step edges of the Bi_{2}Se_{3} surface reveal elementary contribution to the resistivity of TI surfaces. This proves that despite the topological protection the surface morphology plays a critical role for the electron transport, for example, in prospective thin TI filmbased devices. For an ideal TI without any bulk contributions to the conductivity, the sum of the nanoresistances at step edges will limit the macroscopic surface conductivity. Our approach can also be applied to analyse scattering of conduction electrons at other defects structures such as domain boundaries, nonmagnetic and magnetic adsorbates. With this knowledge, it should be possible to tune the electron transport of a TI surface on a local scale for designing smaller and more complex nanoscale device structures.
Methods
Sample preparation of Bi_{2}Se_{3} thin films
For the preparation of Bi_{2}Se_{3} films, we follow the recipe of Zhang et al.^{24} and Vyshnepolsky et al.^{31}:
Bi (purity of 99.997% by Mateck) and Se (purity of 99.999% by Mateck) are coevaporated with a ration Bi:Se of 1:2.25 (excess of Se) onto a Si(111)(3 × 3)Bi substrate at room temperature^{24}. The amount of deposited material is monitored by a quartz micro balance. The geometrical structure for the different steps of preparation is checked by LEED. A Si wafer with a low ndoping (phosphorus, conductivity of 7.7 mS cm^{−1}) and a miscut of 0.5° (ca 30 Sisteps μm^{−1}) was used. Before the deposition of Bi_{2}Se_{3}, the wafer was flashed to 1,500 K and slowly cooled to induce the 7 × 7 reconstruction. The equivalent of 10 ML of bismuth was deposited at a sample temperature of 300 K followed by heating to 720 K to prepare the Bi(3 × 3)reconstruction. We grew a Bi_{2}Se_{3} film with a nominal film thickness of ca 14 nm (about 14 QL), which is known to exhibit the topological phase^{23}. Finally, the sample is annealed at 530 K for 2 h to ensure a flat and smooth film morphology^{31}.
Scanning tunnelling potentiometry
We use STP (Fig. 1a), which was first introduced by Muralt and Pohl^{21} in 1986. This is a STMrelated technique, which allows us to measure the local electrochemical potential μ_{ec} and the local topography of the sample with atomic resolution simultaneously. In brief, two tips contact the sample and apply a voltage V_{trans} leading to a transverse current I_{trans} through the surface. A third tip is brought into tunnelling distance in the area between both contact tips. A potentiometer connects the contact tips and the tunnelling tip in a Wheatstone bridge circuit. If the bridge is balanced, the average DC tunnelling current I_{t} vanishes (〈I_{t}〉=0) and the voltage at the tip matches the local potential V_{loc} at the position of the tunnelling tip. During scanning, the bridge is automatically readjusted for each position of the tunnelling tip and the voltage at the tip is recorded (see Bannani et al.^{22} for details). In addition, a small alternating bias V_{mod} is applied to the tunnelling junction resulting in an AC tunnelling current, which is used to control the distance between tip and sample. Thus, topographic STM imaging and potential mapping are simultaneously provided by STP. The geometry of the three tips and the sample surface monitored by SEM is shown in Fig. 1b.
Additional information
How to cite this article: Bauer, S. and Bobisch, C. A. Nanoscale electron transport at the surface of a topological insulator. Nat. Commun. 7:11381 doi: 10.1038/ncomms11381 (2016).
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Acknowledgements
We gratefully acknowledge Rolf Möller for fruitful discussions and also for the possibility to perform the experiments with the four probe STM. Especially the STP simulation as provided in the supporting information bases on his contribution. Special thanks go also to Michael Hornvon Hoegen, M. Wenderoth and Nicolás Lorente for stimulating and supporting discussions. We also thank the German Research Council (DFG) for funding through project BO 3427/21. D. Utzat is gratefully acknowledged for designing and constructing the STM and STP electronics.
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The manuscript was written by contributions from both the authors. S.B. and C.A.B. planned the experiments and discussed on the analysis of the data. S.B. performed the measurements and C.A.B. conceived the experiment and supervised the work. All authors have given approval to the final version of the manuscript.
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Correspondence to Christian A. Bobisch.
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Supplementary Figures 110, Supplementary Notes 16 and Supplementary References (PDF 3281 kb)
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Bauer, S., Bobisch, C. Nanoscale electron transport at the surface of a topological insulator. Nat Commun 7, 11381 (2016) doi:10.1038/ncomms11381
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