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Multi-terminal memtransistors from polycrystalline monolayer molybdenum disulfide

Nature volume 554, pages 500–504 (2018)Cite this article

Subjects

Abstract

Memristors are two-terminal passive circuit elements that have been developed for use in non-volatile resistive random-access memory and may also be useful in neuromorphic computing1,2,3,4,5,6. Memristors have higher endurance and faster read/write times than flash memory4,7,8 and can provide multi-bit data storage. However, although two-terminal memristors have demonstrated capacity for basic neural functions, synapses in the human brain outnumber neurons by more than a thousandfold, which implies that multi-terminal memristors are needed to perform complex functions such as heterosynaptic plasticity3,9,10,11,12,13. Previous attempts to move beyond two-terminal memristors, such as the three-terminal Widrow–Hoff memristor14 and field-effect transistors with nanoionic gates15 or floating gates16, did not achieve memristive switching in the transistor17. Here we report the experimental realization of a multi-terminal hybrid memristor and transistor (that is, a memtransistor) using polycrystalline monolayer molybdenum disulfide (MoS2) in a scalable fabrication process. The two-dimensional MoS2 memtransistors show gate tunability in individual resistance states by four orders of magnitude, as well as large switching ratios, high cycling endurance and long-term retention of states. In addition to conventional neural learning behaviour of long-term potentiation/depression, six-terminal MoS2 memtransistors have gate-tunable heterosynaptic functionality, which is not achievable using two-terminal memristors. For example, the conductance between a pair of floating electrodes (pre- and post-synaptic neurons) is varied by a factor of about ten by applying voltage pulses to modulatory terminals. In situ scanning probe microscopy, cryogenic charge transport measurements and device modelling reveal that the bias-induced motion of MoS2 defects drives resistive switching by dynamically varying Schottky barrier heights. Overall, the seamless integration of a memristor and transistor into one multi-terminal device could enable complex neuromorphic learning and the study of the physics of defect kinetics in two-dimensional materials18,19,20,21,22.

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Figure 1: Architecture of the MoS2 memtransistor.
Figure 2: Electrical characteristics of MoS2 memtransistors.
Figure 3: In situ measurements and switching mechanism.
Figure 4: Control devices and neural functions of memtransistors.

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Acknowledgements

This research was supported by the Materials Research Science and Engineering Center (MRSEC) of Northwestern University (NSF DMR-1720139) and the 2-DARE programme (NSF EFRI-1433510). The CVD growth of MoS2 was supported by the National Institute of Standards and Technology (NIST CHiMaD 70NANB14H012). Charge transport instrumentation was funded by an ONR DURIP grant (ONR N00014-16-1-3179). H.-S.L. acknowledges the Basic Science Research Program of the National Research Foundation of Korea (NRF), which is funded by the Ministry of Education (2017R1A6A3A03008332). H.B. acknowledges support from the NSERC Postgraduate Scholarship–Doctoral Program. H.B. and M.E.B. acknowledge support from the National Science Foundation through a Graduate Research Fellowship. For this work, we used the Northwestern University NUANCE Center and the Northwestern University Micro/Nano Fabrication Facility (NUFAB), which are partially supported by the Soft and Hybrid Nanotechnology Experimental (SHyNE) Resource (NSF ECCS-1542205), the Materials Research Science and Engineering Center (NSF DMR-1720139), the State of Illinois and Northwestern University. We thank J. J. McMorrow for assistance with photolithography, X. Liu for assistance with lateral force microscopy and S. Mohseni for assistance with atomic force microscopy.

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Author notes

  1. Vinod K. Sangwan and Hong-Sub Lee: These authors contributed equally to this work.

Authors and Affiliations

  1. Department of Materials Science and Engineering, Northwestern University, Evanston, 60208, Illinois, USA

    Vinod K. Sangwan, Hong-Sub Lee, Hadallia Bergeron, Itamar Balla, Megan E. Beck, Kan-Sheng Chen & Mark C. Hersam

  2. Department of Chemistry, Northwestern University, Evanston, 60208, Illinois, USA

    Mark C. Hersam

  3. Department of Electrical Engineering and Computer Science Northwestern University, Northwestern University, Evanston, 60208, Illinois, USA

    Mark C. Hersam

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Contributions

V.K.S., H.-S.L. and M.C.H. conceived the idea and designed the experiments. V.K.S. and H.-S.L. fabricated all the devices and performed measurements and analysis. H.B. and I.B. handled the growth of MoS2 and conducted materials characterization. V.K.S. developed the memtransistor model. M.E.B. assisted in model fitting and device fabrication. K.-S.C. assisted in electrostatic force microscopy. All authors wrote the manuscript and discussed the results at all stages.

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Correspondence to Mark C. Hersam.

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Extended data figures and tables

Extended Data Figure 1 Material characterization of the MoS2 film.

a, Raman spectrum of CVD-grown polycrystalline monolayer MoS2, measured using an excitation wavelength of 532 nm. The Lorentzian peak fits correspond to the and A1g modes. b, Photoluminescence spectrum of MoS2 collected with the same microscope. c, d, XPS spectra of MoS2 on a SiO2/Si substrate, showing the Mo 3d, S 2s and S 2p peaks. e, AFM topography image corresponding to the lateral force microscopy image of Fig. 1c. f, AFM topography image of the edge of a MoS2 flake, showing a monolayer step height of about 0.73 nm.

Extended Data Figure 2 AFM analysis of a residue-free photolithography process.

a, AFM topography image of MoS2 crystals patterned by PMGI-assisted photolithography. The dashed green line shows the location of the edge of the patterned photoresist in the left region and the white dashed line shows the triangular MoS2 crystal domain before reactive ion etching. b, Magnified AFM topography image of the region defined by the black dashed line in a, showing chequered regions of protected (1) MoS2, (2) etched MoS2, (3) protected SiO2 and (4) etched SiO2. c, Height profiles taken along the two horizontal lines in b, showing minimal residue left on the protected SiO2 region. d, Height profiles taken along the two vertical lines in b, showing minor etching of SiO2 under the etched MoS2 region (2). The noise in the height profiles is due to surface roughness and tip artefacts.

Extended Data Figure 3 Extended electrical characteristics of the MoS2 memtransistor.

a, Leakage current IG of the MoS2 memtransistor of Fig. 2a as a function of VG after a high-bias sweep from VD = 80 V to VD = −80 V. We note that the current level of 100 pA is close to the instrumentation noise floor. b, ID–VD curve of a memtransistor (L = 15 μm, W = 150 μm) for different VD sweeps from |20| V to |80| V, showing increasing switching ratio with sweep range (switching ratio >103 for the range from 80 V to −80 V). c, Magnified view of 50 sweep cycles of the device from Fig. 2b, showing an insulating state in a range of negative VD values that is dependent on VG and non-zero crossing, suggesting memcapacitance from contacts. d, ID–VD curve of a MoS2 memtransistor during ten consecutive unipolar positive-bias sweeps from VD = 0 V to 80 V. e, ID–VD curve of the same MoS2 memtransistor during ten consecutive unipolar negative-bias sweeps from VD = 0 V to –80 V. f, Switching from the LRS to the HRS for the MoS2 memtransistor of Fig. 2b in the forward bias for VG > Vcross, where Vcross ≈ 35 V. ID–VD curve of the device of Fig. 2d during 475 voltage sweeps: g, sweeps 1–100; h, sweeps 100–200; i, sweeps 200–300; j, sweeps 300–400; k, sweeps 400–475.

Extended Data Figure 4 Current endurance characteristics.

a, Exponential and stretched exponential fits to a typical subset of endurance points from Fig. 2d. The stretched exponential function is defined as , where A, B, C and n0 are constants and γ ≈ 0.8. Both the exponential and stretched exponential fits show R2 ≈ 0.97, but the stretched exponential shows a better fit at the tail end of the curve. b, Endurance characteristics of a memtransistor, showing only one exponential decay in reverse bias (VD = −10 V). c, ID–VD curve (VG = 0 V) of a device with L = 20 μm and W = 150 μm, showing a negligible memristive loop (ten sweep cycles) for an unoptimized geometry. d, ID–VD curve (VG = 60 V) of a device with L = 10 μm and W = 5 μm, showing a negligible memristive loop (19 sweep cycles) for an unoptimized geometry. e, HRS and LRS retention characteristics from Fig. 2e plotted and extrapolated in a doubly logarithmic scale. The relaxation of the two states is faster than conventional filament-based memristors, such as TiO2.

Extended Data Figure 5 In situ EFM of a MoS2 memtransistor.

a, Schematic of the in situ EFM measurements of MoS2 memtransistors. b, AFM topography image of the device from Fig. 3a, showing grain boundaries highlighted by red arrows. c, Reproduction of the EFM phase images of Fig. 3a in the forward HRS. d–f, EFM phase images in the forward LRS, reverse LRS and reverse HRS, which were used for the line profiles shown in Fig. 3b. g–o, EFM phase profiles along the red dashed lines 1–8 and 10 in c and d. The EFM phase profile along line 9 is shown in Fig. 3b. All profiles are averaged over 128 lines and are normalized with the EFM phase values at the drain and source.

Extended Data Figure 6 Low-temperature transport measurements of a MoS2 memtransistor.

a, ID–VG curve of the device shown in Fig. 3c (in the LRS) at VD = 0.1 V for temperature varying from 300 K to 75 K at a step of 25 K. b, Plot of ln(ID/T3/2) versus 1,000/T for different VG values, which was used to extract the Schottky barrier height through the thermionic emission model. c, d, ID–VG and field-effect mobility versus the VG value of the same device in the LRS and the HRS, respectively. The crossing curves in c show Vth shifts by 15 V between the HRS and LRS and Vcross ≈ 42 V.

Extended Data Figure 7 Memtransistor modelling.

a, Schematic of the increased doping region near the contact, which results in a larger field and reduced metal–semiconductor Schottky barrier height. b, Simulated variation of wsΔn at the source contact for forward bias (sweeps 1 and 2 in Fig. 2a). c, Simulation variation of wdΔn at the drain contact for reverse bias (sweeps 3 and 4 in Fig. 2a). d, Simulated ID–VD curve of a MoS2 memtransistor in the forward bias with different VG values from 10 V to −30 V. e, Simulated variation in wsΔn for the same VG values. The key between d and e applies to both plots.

Extended Data Figure 8 LRS–LRS MoS2 memtransistor characteristics and mechanism.

a, Schematic of an LRS–LRS memtransistor in which a thin photoresist layer acts as a tunnel barrier between the metal contacts and the MoS2 film. b, AFM topography images, showing the step height of the remaining photoresist on a blank Si substrate after a fabrication process without using PMGI. The inset shows the height profile along the white dashed line, which reveals a thickness of about 1.5 nm. c, Gate-tunable ID–VD curves from Fig. 3d shown in a linear scale. d, ID–VD curves of 50 sweep cycles of the LRS–LRS memristor of Fig. 3d. e, Table showing the resistive switching characteristics of LRS–HRS and LRS–LRS memtransistors at the source and drain contacts during the four stages of a full sweep cycle. The conditions of the relative resistance values that are necessary for the two different switching behaviours are listed in the top right corner. Three kinds of resistive switching events, A, B and C, are shown by coloured arrows (see Methods section ‘The switching mechanism’ for details).

Extended Data Figure 9 Electromigration-induced degradation in control MoS2 devices.

a, AFM topography images (corresponding to the upper inset of Fig. 4a), showing electromigration-induced degradation in the material (cyan arrow) near the source electrode (top). The colour scale represents height difference. b, AFM phase image of a device with an hourglass-shaped channel (that is, varying channel length from 5 μm to 1 μm), showing dendritic features along the entire source electrode (top). Without Schottky contacts, we expect a thermal ‘hot spot’ with high local temperature in the region of the highest electric field (VD/L) (that is, only in the narrowest region in the centre of the channel). Absence of such localized breakdown rules out Joule heating and favours electromigration near the source contact as the dominant phenomenon. The width of the source electrode edge (Ws) is shown by the white arrows. c, ID–VD curves (85 sweep cycles) of a degraded polycrystalline monolayer MoS2 memtransistor at VG = 0 V (L = 5 μm, W = 100 μm). d, AFM topography image of the device of c, showing the dendritic features above the white dashed line. e, A series of five successive snapshots (left to right) from a video captured by a black-and-white camera during sweep 3, as indicated by the dashed red line in c. The red outline and dashed black line in the first frame show the probe tip and electrode pads, respectively. The three middle frames show bright spots from light emission in the channel close to the source electrode (right), marked by black arrows. Light emission was observed during all 85 sweep cycles shown in c. f, Breakdown current Ibr (defined in Fig. 4a), showing a linear correlation with Ws for nine single-flake control MoS2 devices. g, Breakdown voltage Vbr (defined in Fig. 4a), showing a linear correlation with L, which suggests that the potential decreases both across the channel and at the Schottky contacts. h, Power (Ibr × Vbr), showing a linear correlation with the channel area (L × W). i, Vbr, showing no correlation with Ws. j, Ibr also shows no correlation with L.

Extended Data Figure 10 Electrical characteristics of multi-terminal heterosynaptic device.

a–e, Low-bias Iij–Vij curves of 5 permutations of the inner electrodes 1–4 of Fig. 4b at VG = 20 V, where ij = 12, 13, 14, 23 and 34. I24–V24 is shown in Fig. 4b. The key in a applies to all panels a–e. The black curves were measured before any pulsing. The green curves were measured after applying a −80-V pulse at V56 (5, drain; 6, source) four times at a voltage ramping rate of 10 V s−1. The red curves were measured after applying a −80-V pulse at V65 (6, drain; 5, course) three times at the same ramping rate. The conductance returns to the pre-pulse state for all electrode combinations. The I34–V34 curve could not be measured after the V65 pulse cycle. f, Change in the conductance between electrodes 2 and 4 (G24), with V56 and V65 pulses for different VG values showing gate tunability of heterosynaptic plasticity. g, h, Spatial profile of the MoS2 conductance band minimum (Ec) along the two dashed lines in g, which pass through (x) and outside (y) the side electrodes.

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Sangwan, V., Lee, HS., Bergeron, H. et al. Multi-terminal memtransistors from polycrystalline monolayer molybdenum disulfide. Nature 554, 500–504 (2018). https://doi.org/10.1038/nature25747

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