The large-scale growth of semiconducting thin films forms the basis of modern electronics and optoelectronics. A decrease in film thickness to the ultimate limit of the atomic, sub-nanometre length scale, a difficult limit for traditional semiconductors (such as Si and GaAs), would bring wide benefits for applications in ultrathin and flexible electronics, photovoltaics and display technology1,2,3. For this, transition-metal dichalcogenides (TMDs), which can form stable three-atom-thick monolayers4, provide ideal semiconducting materials with high electrical carrier mobility5,6,7,8,9,10, and their large-scale growth on insulating substrates would enable the batch fabrication of atomically thin high-performance transistors and photodetectors on a technologically relevant scale without film transfer. In addition, their unique electronic band structures provide novel ways of enhancing the functionalities of such devices, including the large excitonic effect11, bandgap modulation12, indirect-to-direct bandgap transition13, piezoelectricity14 and valleytronics15. However, the large-scale growth of monolayer TMD films with spatial homogeneity and high electrical performance remains an unsolved challenge. Here we report the preparation of high-mobility 4-inch wafer-scale films of monolayer molybdenum disulphide (MoS2) and tungsten disulphide, grown directly on insulating SiO2 substrates, with excellent spatial homogeneity over the entire films. They are grown with a newly developed, metal–organic chemical vapour deposition technique, and show high electrical performance, including an electron mobility of 30 cm2 V−1 s−1 at room temperature and 114 cm2 V−1 s−1 at 90 K for MoS2, with little dependence on position or channel length. With the use of these films we successfully demonstrate the wafer-scale batch fabrication of high-performance monolayer MoS2 field-effect transistors with a 99% device yield and the multi-level fabrication of vertically stacked transistor devices for three-dimensional circuitry. Our work is a step towards the realization of atomically thin integrated circuitry.
Access optionsAccess options
Subscribe to Journal
Get full journal access for 1 year
only $3.90 per issue
All prices are NET prices.
VAT will be added later in the checkout.
Rent or Buy article
Get time limited or full article access on ReadCube.
All prices are NET prices.
We thank P. L. McEuen, M.-H. Jo, H. Heo and H.-C. Choi for discussions, and M. Guimaraes and Z. Ziegler for help in preparing the manuscript. This work was supported mainly by the AFOSR (FA2386-13-1-4118 and FA9550-11-1-0033) and the Nano Material Technology Development Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT, and Future Planning (2012M3A7B4049887). Additional funding was provided by the National Science Foundation (NSF) through the Cornell Center for Materials Research (NSF DMR-1120296) and by the Samsung Advanced Institute for Technology GRO Program. Device fabrication was performed at the Cornell NanoScale Facility, a member of the National Nanotechnology Infrastructure Network, which is supported by the National Science Foundation (ECS-0335765).
This file contains Supplementary Methods, Supplementary Notes, Supplementary Figures 1-17 and additional references.
About this article
Nature Communications (2018)