The authors of the International Technology Roadmap for Semiconductors1—the industry consensus set of goals established for advancing silicon integrated circuit technology—have challenged the computing research community to find new physical state variables (other than charge or voltage), new devices, and new architectures that offer memory and logic functions1,2,3,4,5,6 beyond those available with standard transistors. Recently, ultra-dense resistive memory arrays built from various two-terminal semiconductor or insulator thin film devices have been demonstrated7,8,9,10,11,12. Among these, bipolar voltage-actuated switches have been identified as physical realizations of ‘memristors’ or memristive devices, combining the electrical properties of a memory element and a resistor13,14. Such devices were first hypothesized by Chua in 1971 (ref. 15), and are characterized by one or more state variables16 that define the resistance of the switch depending upon its voltage history. Here we show that this family of nonlinear dynamical memory devices can also be used for logic operations: we demonstrate that they can execute material implication (IMP), which is a fundamental Boolean logic operation on two variables p and q such that pIMPq is equivalent to (NOTp)ORq. Incorporated within an appropriate circuit17,18, memristive switches can thus perform ‘stateful’ logic operations for which the same devices serve simultaneously as gates (logic) and latches19 (memory) that use resistance instead of voltage or charge as the physical state variable.
We thank J. Straznicky for initial experimental work, R. Roth, W. Robinett and D. M. Strukov for discussions, and X. Li and D. Ohlberg for their expert device fabrication.
Author Contributions The memristive IMP gate was conceived by G.S.S., P.J.K. and R.S.W. J.B. and D.R.S. designed the experiments and J.B. performed the measurements. J.J.Y. prepared the memristors. J.B., D.R.S. and R.S.W. wrote the manuscript.
This file contains Supplementary Table S1, Supplementary Figures S1-S5 with legends and Supplementary References for Supplementary Figure S4.