Using nanoscale thermocapillary flows to create arrays of purely semiconducting single-walled carbon nanotubes

Journal name:
Nature Nanotechnology
Volume:
8,
Pages:
347–355
Year published:
DOI:
doi:10.1038/nnano.2013.56
Received
Accepted
Published online

Abstract

Among the remarkable variety of semiconducting nanomaterials that have been discovered over the past two decades, single-walled carbon nanotubes remain uniquely well suited for applications in high-performance electronics, sensors and other technologies. The most advanced opportunities demand the ability to form perfectly aligned, horizontal arrays of purely semiconducting, chemically pristine carbon nanotubes. Here, we present strategies that offer this capability. Nanoscale thermocapillary flows in thin-film organic coatings followed by reactive ion etching serve as highly efficient means for selectively removing metallic carbon nanotubes from electronically heterogeneous aligned arrays grown on quartz substrates. The low temperatures and unusual physics associated with this process enable robust, scalable operation, with clear potential for practical use. We carry out detailed experimental and theoretical studies to reveal all of the essential attributes of the underlying thermophysical phenomena. We demonstrate use of the purified arrays in transistors that achieve mobilities exceeding 1,000 cm2 V−1 s−1 and on/off switching ratios of ~10,000 with current outputs in the milliamp range. Simple logic gates built using such devices represent the first steps toward integration into more complex circuits.

At a glance

Figures

  1. Process for exploiting thermocapillary effects in the purification of arrays of SWNTs.
    Figure 1: Process for exploiting thermocapillary effects in the purification of arrays of SWNTs.

    a,b, Schematic illustration (a) and corresponding AFM images (b) of various stages of the process applied to an array of five m-SWNTs and three s-SWNTs. Uniform thermal evaporation forms a thin, amorphous organic coating that functions as a thermocapillary resist. A series of processing steps defines a collection of electrodes and dielectric layers for selective injection of current into the m-SWNTs. The Joule heating that results from this process induces thermal gradients that drive flow of thermocapillary resist away from the m-SWNT, to form open trenches with widths, measured near the substrate, of ~100 nm. Reactive ion etching physically eliminates the m-SWNT exposed in this fashion, while leaving the coated s-SWNTs unaltered. Removing the thermocapillary resist and electrode structures completes the process, to yield arrays comprising only s-SWNTs. c, Typical transfer characteristics for a transistor built with an array of SWNTs in a partial gate geometry, evaluated before and after purification. Quantities Ion,b and Ion,a correspond to currents measured in the on states before and after purification, respectively. Here, the on/off ratio improves by a factor of 2 × 104, while Ion,a/Ion,b remains relatively large (~0.25). d, Ratios between currents in the on and off states before and after purification (Ion,b and Ioff,a, respectively) as a function of the ratio of the number of SWNTs after purification (Na) to the number of SWNTs before purification (Nb). All devices show on/off ratios >2 × 103, with most >1 × 104. This result is consistent with complete removal of all m-SWNTs. e, Ratio of Ion,a to Ion,b as a function of Na/Nb for the entire set of devices with Nb > 7. The results are consistent with modelling (lines) that assumes complete retention of s-SWNTs through the purification process, expected relative populations of s-SWNTs and m-SWNTs in the arrays, and ratios of conductivities of m-SWNTs and s-SWNTs (in their on state) that lie in an experimentally expected range.

  2. Thermal origins and power scaling in behaviour of the thermocapillary resists.
    Figure 2: Thermal origins and power scaling in behaviour of the thermocapillary resists.

    a, Scanning Joule expansion microscope image of an array of SWNTs in an operating, two-terminal device on quartz. The electrodes (separation of ~30 µm) are above and below the image, out of the field of view. Coordinates x and y lie perpendicular and parallel to the direction of alignment of the SWNTs, respectively. b, Topographical images of the device in a, coated with a thin (~25 nm) layer of thermocapillary resist, collected after operation at bias conditions of 0.27 V µm−1 (top), 0.5 V µm−1 (middle) and 1.0 V µm−1 (bottom). Comparison of these images with those collected by scanning Joule expansion microscopy reveals a clear correlation between a.c. expansion (E0, and therefore temperature) and the formation of trenches in the thermocapillary resist (d.c. heating). c, Thermal expansion E0 (a.c.) induced by Joule heating in an individual SWNT with input power density Q0  13 µW µm−1 (peak to peak), measured by scanning Joule expansion microscopy (symbols) as a function of position x, where x = 0 is the location of the SWNT on a SiO2/Si substrate. Results of thermomechanical modelling are shown as a line. d, Computed a.c. temperature rise θ0 and thermal gradients dθ0/dx at the surface of the thermocapillary resist using experimentally validated models, for the case of the SWNT in c. The results indicate small increases in temperature for levels of Joule heating that induce trenches in the thermocapillary resist (~3–10 µW µm−1). e, Top graph: a.c. thermal expansion (arbitrary units) measured by scanning Joule expansion microscope along the length y of the fourth SWNT from the left in the array that appears in a and b. Bottom graph: width of the corresponding trench that appears in the thermocapillary resist (WTc measured at the top of the film) for an applied bias of ~1 V µm−1. The results show variations in WTc that are nearly ten times smaller than those in expansion (and therefore temperature). f, Measurements of the average WTc as a function of Q0. The results reveal no systematic dependence on Q0 over this range. The highlighted region corresponds to the values of Q0 associated with optimized conditions for the purification process. Error bars indicate the standard deviation of the range of measured widths.

  3. Nanoscale thermocapillary flows in thermocapillary resists induced by Joule heating in SWNTs.
    Figure 3: Nanoscale thermocapillary flows in thermocapillary resists induced by Joule heating in SWNTs.

    a, Schematic illustration of the geometry of the system, with key parameters defined. The SWNT, thermocapillary resist and substrate are grey, green and blue, respectively. b, Theoretically calculated normalized surface profiles of the thermocapillary resist, , as a function of normalized distance and time , showing the evolution of the trench geometry with thermocapillary flow. The simulations used polystyrene because relevant materials parameters were available in the literature. c, AFM images of a SWNT coated with thermocapillary resist (~25 nm) after Joule heating (0.66 V µm−1) for 1, 10, 30, 60, 120 and 300 s, induced by current injection at electrodes that lie outside of the field of view. Thermocapillary flow creates a trench that aligns to the SWNT and grows in width over time. d, Averaged cross-sectional profiles extracted from measurements like those shown in c. The results compare favourably to the modelling in b. e, AFM image, rendered in a three-dimensional perspective view collected at a duration of 1,800 s. The width in this case is sufficiently large that AFM measurements clearly reveal that thermocapillary flow completely and cleanly exposes the SWNT. f, Widths of trenches measured by AFM from the ridges that form at the top surface (WTc), shown as a function of time of Joule heating for two different SWNTs, with a field of 0.66 V µm−1. Both model and experiment show a power-law time dependence with an exponent of 0.25.

  4. Description of two alternative approaches to scale thermocapillary separation for large-area applications.
    Figure 4: Description of two alternative approaches to scale thermocapillary separation for large-area applications.

    a, Optical microscope image of a set of electrodes for thermocapillary purification of an array of many hundreds of SWNTs. b, Scanning electron microscope image of a small region of the structure shown in a. c, Transfer characteristics before and after removal of m-SWNTs from the region between the electrodes shown in a. The results indicate outcomes consistent with observations from small-scale demonstrations, that is, high on/off ratios of ~1 × 103 and modest reductions in on current (Ion,a/Ion,b  20%). d, Optical micrograph and schematic illustration of an alternative mode for scaled implementation. An interconnected array of 25 sets of electrodes allows purification over a collection of small regions, in a parallel fashion. Associated transfer curves are similar to those shown in c.

  5. Thermocapillary purification process performed with a reusable bottom split gate structure.
    Figure 5: Thermocapillary purification process performed with a reusable bottom split gate structure.

    a, Schematic illustration of two purification processes implemented on different arrays of SWNTs using a single bottom split gate electrode structure. (i) As-grown array of aligned SWNTs. (ii) Bottom electrode after transfer of these SWNTs (gate dielectric, red; source and drain electrodes, gold; gate electrode, gold). (iii) s-SWNTs remaining after purification. (iv) Transfer of s-SWNTs to a device substrate. b, Transfer characteristics before and after a first purification process with a bottom electrode structure: Ion,a/Ion,b = 23% and the on/off ratio after purification is ~1 × 104. c, Transfer characteristics before and after a second purification process with the same bottom electrode structure: Ion,a/Ion,b = 30% and the on/off ratio is ~2 × 104. This reusable structure has W = L = 30 µm.

  6. Short channel transistors and logic gates that use s-SWNT arrays created by thermocapillary purification.
    Figure 6: Short channel transistors and logic gates that use s-SWNT arrays created by thermocapillary purification.

    a, Schematic illustration of the geometry of a short channel (L  800 nm) transistor that incorporates an array of s-SWNTs formed by the thermocapillary purification process (~10 s-SWNTs). b, Optical micrograph and scanning electron microscope image of the device (taken before deposition of the gate dielectric). c, Output characteristics for gate bias of VGS = −3, −2, −1, 0, 1 V and VDS = −2 to 0 V. Inset: transfer characteristics for VDS = −0.1 V (black) and −1 V (red). d,e, Circuit diagram (d) and optical micrograph (e) of an inverter formed with two transistors that use arrays of s-SWNTs formed by thermocapillary purification. f, Voltage transfer characteristics of the inverter.

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Author information

  1. These authors contributed equally to this work

    • Sung Hun Jin &
    • Simon N. Dunham

Affiliations

  1. Departments of Materials Science and Engineering, Frederick Seitz Materials Research Laboratory, University of Illinois at Urbana-Champaign, Urbana, Illinois 61801, USA

    • Sung Hun Jin,
    • Simon N. Dunham,
    • Xu Xie,
    • Ji-hun Kim,
    • Ahmad Islam,
    • Frank Du,
    • Monisha Menon,
    • Eugene Cho &
    • John A. Rogers
  2. Department of Mechanical and Aerospace Engineering, University of Miami, Coral Gables, Florida 33146, USA

    • Jizhou Song
  3. Department of Civil Engineering and Soft Matter Research Center, Zhejiang University, Hangzhou 310058, China

    • Chaofeng Lu
  4. Department of Civil and Environmental Engineering and Department of Mechanical Engineering, Northwestern University, Evanston, Illinois 60208, USA

    • Chaofeng Lu,
    • Yuhang Li &
    • Yonggang Huang
  5. Department of Mechanical Science and Engineering, University of Illinois at Urbana-Champaign, Urbana, Illinois 61801, USA

    • Johnny Felts,
    • Kyle L. Grosse,
    • William P. King &
    • John A. Rogers
  6. Department of Electrical Engineering, University of Illinois at Urbana-Champaign, Urbana, Illinois 61801, USA

    • Jaeseong Kim,
    • Feng Xiong,
    • Dong Joon Lee,
    • Ha Uk Chung,
    • Eric Pop &
    • John A. Rogers
  7. School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana 47907, USA

    • Muhammad A. Wahab &
    • Muhammad A. Alam

Contributions

S.H.J., S.N.D. and J.A.R. conceived and designed the experiments. S.H.J., S.N.D., X.X., A.I., J.K., F.D., J.S., J.F., M.M., E.C. and K.G. performed the experiments. J.S., C.L., Y.L., F.X., M.A.W., M.A.A. and Y.H. performed modelling and simulations. E.P., M.A.A., B.K., Y.H. and J.A.R. provided technical guidance. S.H.J., S.N.D., X.X., J.S., Y.H. and J.A.R. analysed the experiments and simulations. S.H.J., S.N.D., J.S. and J.A.R. wrote the manuscript.

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The authors declare no competing financial interests.

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