A nanoscale combing technique for the large-scale assembly of highly aligned nanowires

Journal name:
Nature Nanotechnology
Volume:
8,
Pages:
329–335
Year published:
DOI:
doi:10.1038/nnano.2013.55
Received
Accepted
Published online

Abstract

The controlled assembly of nanowires is a key challenge in the development of a range of bottom-up devices1, 2. Recent advances2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19 in the post-growth assembly of nanowires and carbon nanotubes have led to alignment ratios of 80–95% for a misalignment angle of ±5° (refs 5, 12, 13, 14) and allowed various multiwire devices to be fabricated6, 10, 11, 12, 13, 19. However, these methods still create a significant number of crossing defects, which restricts the development of device arrays and circuits based on single nanowires/nanotubes. Here, we show that a nanocombing assembly technique, in which nanowires are anchored to defined areas of a surface and then drawn out over chemically distinct regions of the surface, can yield arrays with greater than 98.5% of the nanowires aligned to within ±1° of the combing direction. The arrays have a crossing defect density of ~0.04 nanowires per µm and efficient end registration at the anchoring/combing interface. With this technique, arrays of single-nanowire devices are tiled over chips and shown to have reproducible electronic properties. We also show that nanocombing can be used for laterally deterministic assembly, to align ultralong (millimetre-scale) nanowires to within ±1° and to assemble suspended and crossed nanowire arrays.

At a glance

Figures

  1. Schematics and demonstration of nanocombing.
    Figure 1: Schematics and demonstration of nanocombing.

    a, Schematics of the nanocombing process. The blue arrow indicates the travelling direction of the growth substrate with respect to the target substrate, which yields a combing/aligning force that is parallel and opposite to the anchoring force. The dashed window at the right bottom shows a side view of the nanocombing process. bd, SEM images of silicon nanowires on the combing (resist) surface at different magnifications. The thickness of the resist (S1805) layer was ~70 nm. Scale bars: 50 µm (b), 10 µm (c), 2 µm (d). e, Angle distribution of the combed nanowires obtained from analysis of nanowire arrays combed over a 3 mm × 11 mm chip, where the logarithm of nanowire (NW) number is plotted with respect to misalignment angle (see Methods for details).

  2. Nanowire density control.
    Figure 2: Nanowire density control.

    a, Silicon nanowire density on the combing (resist) surface with respect to different anchoring lengths. The statistics are based on nanowires with lengths >4 µm. Data are from the sample shown in Fig. 1b–d. b, Nanowire density with respect to different resist/combing layer thicknesses. The anchoring surfaces were modified using the same conditions in all cases. The star indicates the combed nanowire density by anchoring-surface modification using 10 s development and 50 s KOH treatment. Inset: nanowire density with respect to different combing pressures. The nanowire density comparisons in b are all based on the same anchoring length of 30 µm.

  3. Nanowire device arrays.
    Figure 3: Nanowire device arrays.

    a, Dark-field image of silicon nanowire arrays. The anchoring windows were defined by photolithography, and the resist layer (S1805) thickness was ~70 nm. Scale bar, 100 µm. b, SEM image of one of the combed nanowire arrays on the resist layer. Scale bar, 2 µm. c, Dark-field image of trimmed nanowire arrays (resist layer removed). Scale bar, 40 µm. d, Optical image of nanowire device arrays connecting to electrode arrays. Scale bar, 200 µm. e, Representative SEM image of one of the device arrays. Scale bar, 2 µm. f, IdsVg characteristics (Vds = 0.1 V) from 20 top-gated Ge/Si nanowire devices assembled by nanocombing. The channel length of the devices is ~3.8 µm, with Al2O3 (7 nm) serving as the dielectric layer for the top gate (Cr/Au = 5/50 nm). The electrical characterizations were performed in an ambient environment.

  4. Nanocombing applications.
    Figure 4: Nanocombing applications.

    a, Left: schematic of periodic silicon nanowire array by nanocombing. Right: SEM image of the resulting periodic nanowire array on the resist (PMMA) surface. Each anchoring window has a 300 nm × 15 µm (W × L) SiO2 surface defined by electron-beam lithography, with the PMMA layer (thickness of ~50 nm) serving as the combing surface. The SiO2 surface was functionalized in MF-319 (50 s) and cleaned (20 s in deionized water) before combing. Scale bar, 2 µm. b, SEM image of a periodic silicon nanowire device array made from the combing method shown in a. c, Dark-field image of ultralong silicon nanowires on the combing surface (70 nm S1805). d, A millimetre-long combed silicon nanowire on the resist surface. e, SEM image of a suspended silicon nanowire array. The resist layer has been removed. Scale bar, 1 µm. f, Left: schematics of the two consecutive combing steps used to define a crossed nanowire array. The first layer of combed nanowires, produced in the standard manner, is treated as a substrate and processed in the standard manner for nanocombing the second crossed array of nanowires. Note that during the second perpendicular combing process, a thicker resist layer (~80 nm) was used, and the window was cleaned for 10 s in buffered oxide etch (BOE, 1:7, Transene) and modified with developer (MF-CD-26) before nanocombing. Right: SEM image of a silicon nanowire crossbar array. The resist layer has been removed. Scale bar, 1 µm. The first combing was horizontal (from left to right) and the second combing was vertical (from bottom to top).

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Author information

Affiliations

  1. Department of Chemistry and Chemical Biology, Harvard University, Cambridge, Massachusetts 02138, USA

    • Jun Yao,
    • Hao Yan &
    • Charles M. Lieber
  2. School of Engineering and Applied Science, Harvard University, Cambridge, Massachusetts 02138, USA

    • Charles M. Lieber

Contributions

J.Y. and C.M.L. designed the experiments. J.Y. performed the experiments and data analysis. H.Y. helped in nanowire synthesis and device fabrication. J.Y. and C.M.L. co-wrote the manuscript. All authors discussed the results and commented on the manuscript.

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The authors declare no competing financial interests.

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