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Nanowire transistors without junctions

Abstract

All existing transistors are based on the use of semiconductor junctions formed by introducing dopant atoms into the semiconductor material. As the distance between junctions in modern devices drops below 10 nm, extraordinarily high doping concentration gradients become necessary. Because of the laws of diffusion and the statistical nature of the distribution of the doping atoms, such junctions represent an increasingly difficult fabrication challenge for the semiconductor industry. Here, we propose and demonstrate a new type of transistor in which there are no junctions and no doping concentration gradients. These devices have full CMOS functionality and are made using silicon nanowires. They have near-ideal subthreshold slope, extremely low leakage currents, and less degradation of mobility with gate voltage and temperature than classical transistors.

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Figure 1: Schematic of an n-channel nanowire transistor.
Figure 2: Transmission electron micrograph of silicon gated resistor nanoribbons.
Figure 3: Current–voltage characteristics.
Figure 4: Measured output characteristics of gated resistors.
Figure 5: Electron concentration contour plots in an n-type junctionless gated resistor.
Figure 6: Intrinsic device delay time for a MOSFET and for gated resistors.

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Acknowledgements

This work is supported by the Science Foundation Ireland grant 05/IN/I888: ‘Advanced scalable silicon-on-insulator devices for beyond-end-of-roadmap semiconductors’. This work has also been made possible by the Programme for Research in Third-Level Institutions. This work was supported in part by the European Community (EC) Seventh Framework Program through the Networks of Excellence NANOSIL and EUROSOI+ under contracts 216171 and 216373. The authors wish to thank R. Nagle, R. Dunne and S. Cosgrove for TEM analysis.

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I.F., B.O'N., A.B., M.W., A.M.K. and B.McC. were responsible for device processing and I.F. and R.M. for device layout. A.A., N.D.A., R.Y., C.W.L. and P.R. performed device simulations. C.W.L. performed the electrical measurements and J.P.C. designed the devices and wrote the paper. All authors discussed the results and commented on the manuscript.

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Correspondence to Jean-Pierre Colinge.

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The authors declare no competing financial interests.

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Colinge, JP., Lee, CW., Afzalian, A. et al. Nanowire transistors without junctions. Nature Nanotech 5, 225–229 (2010). https://doi.org/10.1038/nnano.2010.15

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