Letters to Nature

Nature 431, 963-966 (21 October 2004) | doi:10.1038/nature02987; Received 5 March 2004; Accepted 31 August 2004

Low-voltage organic transistors with an amorphous molecular gate dielectric

Marcus Halik1, Hagen Klauk1, Ute Zschieschang1, Günter Schmid1, Christine Dehm1, Markus Schütz2, Steffen Maisch2, Franz Effenberger2, Markus Brunnbauer3 and Francesco Stellacci3

  1. Infineon Technologies AG, New Memory Platforms, Materials and Technology, Paul-Gossen-Stras zlige 100, 91052 Erlangen, Germany
  2. University Stuttgart, Department of Chemistry, Pfaffenwaldring 55, 70569 Stuttgart, Germany
  3. Massachusetts Institute of Technology, Department of Materials Science and Engineering, 77 Massachusetts Avenue, Cambridge, Massachusetts 02139, USA

Correspondence to: Marcus Halik1 Correspondence and requests for materials should be addressed to M.H. (Email: marcus.halik@infineon.com).

Organic thin film transistors (TFTs) are of interest for a variety of large-area electronic applications, such as displays1, 2, 3, sensors4, 5 and electronic barcodes6, 7, 8. One of the key problems with existing organic TFTs is their large operating voltage, which often exceeds 20 V. This is due to poor capacitive coupling through relatively thick gate dielectric layers: these dielectrics are usually either inorganic oxides or nitrides2, 3, 4, 5, 6, 7, 8, or insulating polymers9, and are often thicker than 100 nm to minimize gate leakage currents. Here we demonstrate a manufacturing process for TFTs with a 2.5-nm-thick molecular self-assembled monolayer (SAM) gate dielectric and a high-mobility organic semiconductor (pentacene). These TFTs operate with supply voltages of less than 2 V, yet have gate currents that are lower than those of advanced silicon field-effect transistors with SiO2 dielectrics. These results should therefore increase the prospects of using organic TFTs in low-power applications (such as portable devices). Moreover, molecular SAMs may even be of interest for advanced silicon transistors where the continued reduction in dielectric thickness leads to ever greater gate leakage and power dissipation.

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