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Three-dimensional imaging of integrated circuits with macro- to nanoscale zoom

Nature Electronics volume 2, pages 464–470 (2019)Cite this article

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Abstract

The imaging of integrated circuits across different length scales is required for failure analysis, design validation and quality control. At present, such inspection is accomplished using a hierarchy of different probes, from optical microscopy on the millimetre length scale to electron microscopy on the nanometre scale. Here we show that ptychographic X-ray laminography can provide non-destructive, three-dimensional views of integrated circuits, yielding both images of an entire chip volume and high-resolution images of arbitrarily chosen subregions. We demonstrate the approach using chips produced with 16 nm fin field-effect transistor technology, achieving a reconstruction resolution of 18.9 nm, and compare our results with photolithographic mask layout files and more conventional imaging approaches such as scanning electron microscopy. The technique should also be applicable to other branches of science and engineering where three-dimensional X-ray images of planar samples are required.

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Fig. 1: Imaging geometries.
Fig. 2: 3D renderings at different zoom levels covering a length-scale range from a 300 µm overview to nanometric device structures.
Fig. 3: 3D rendering and circuit diagram of an inverter.
Fig. 4: Comparison of different imaging techniques applied to different samples of the same chip area, showing the second-lowest metal layer M1.

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Data availability

The aligned laminography projections generated during the current study are available under the Creative Common license in the Zenodo repository, https://doi.org/10.5281/zenodo.2657340.

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Acknowledgements

The measurements were performed at the cSAXS beamline of the Swiss Light Source at the Paul Scherrer Institut.

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Authors and Affiliations

  1. Paul Scherrer Institut, Villigen PSI, Villigen, Switzerland

    Mirko Holler, Michal Odstrcil, Manuel Guizar-Sicairos, Maxime Lebugle, Elisabeth Müller, Simone Finizio, Gemma Tinti, Christian David, Oliver Bunk, Jörg Raabe & Gabriel Aeppli

  2. Department of Electrical and Computer Engineering, University of Southern California, Los Angeles, CA, USA

    Joshua Zusman, Walter Unglaub & A. F. J. Levi

  3. Department of Physics, ETH Zürich, Zürich, Switzerland

    Gabriel Aeppli

  4. Institut de Physique, EPFL, Lausanne, Switzerland

    Gabriel Aeppli

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  1. Mirko Holler
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Contributions

Sample preparation was carried out by E.M., S.F. and A.F.J.L. The X-ray measurements were made by M.H., M.O. and M.G.-S. The PyXL endstation was developed by M.H. and J.R. The X-ray data were analysed and visualized by M.H., M.O. and M.G.-S. Specialized algorithms for alignment and processing of projections and laminography reconstruction were developed by M.O. The X-ray illumination lens was produced by M.L. and C.D. The X-ray detector was developed by G.T. The focused ion beam/SEM data were collected by J.Z., W.U. and A.F.J.L. The manuscript was written by M.H., M.O., M.G.-S., O.B., A.F.J.L. and G.A.

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Correspondence to Mirko Holler.

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Supplementary information

Supplementary Information

Supplementary Figs. 1–6 and Table 1.

Supplementary Video 1

3D rendering of the PyXL measurement showing a zoom from the low-resolution overview measurement to device scales.

Supplementary Video 2

Slices of the inverter with the measured PyXL data and GDS model side by side.

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Holler, M., Odstrcil, M., Guizar-Sicairos, M. et al. Three-dimensional imaging of integrated circuits with macro- to nanoscale zoom. Nat Electron 2, 464–470 (2019). https://doi.org/10.1038/s41928-019-0309-z

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