Silicene is the silicon counterpart of graphene, that is, it consists of a single layer of Si atoms arranged in a hexagonal network. This new two-dimensional material, first predicted by theory, has been recently grown on different metallic surfaces.1, 2, 3 An obvious advantage of silicene (over graphene) for nanoelectronic applications is its better compatibility and expected integration with the existing Si nanotechnology platform. A new breakthrough on this material has been recently reported by Tao et al.,4 who have successfully fabricated the first silicene-based field effect transistors (FETs) operating at room temperature. Their success relies on the development of a layer transfer process, called ‘silicene-encapsulated delamination with native electrodes’ (SEDNE). This innovative process includes the following key steps: (1) epitaxial growth of silicene on Ag(111) thin films grown on mica substrates; (2) Al2O3 in situ encapsulation of the silicene layer, followed by its delamination transfer on a p++Si/SiO2 substrate; and (3) subsequent Ag source/drain contact formation by e-beam lithography. A resulting silicene-based FET, with the p++Si substrate used as a back-gate contact, is shown in Figure 1a.

The transfer characteristics of these transistors, measured at room temperature, reveal ambipolar current–voltage characteristics (see Figure 1b), as expected for a gapless semiconductor with Dirac cones in its electronic structure. Unlike graphene, the transfer characteristics of the silicene FETs also indicate the likely presence of an energy band gap in its electronic structure of about 200 meV. The extracted carrier mobility is typically about 100 cm2 (V s)−1, much lower than typical values reported in graphene, usually exceeding 1000 cm2 (V s)−1. The lower carrier mobility in silicene is attributed to strong scattering by out-of-plane acoustic phonon modes, which are absent in graphene, as well as to grain boundary scattering, due to the co-existence of several silicene phases or reconstructions on Ag(111) surfaces.

Although these results are very promising, and pave the way to the possible realization of silicene-based nanoelectronic devices, further optimization of the silicene FET fabrication process is required to improve their electrical performances. An important issue is the stability of the silicene surface when exposed to air: the electrical properties of the devices rapidly degrade (within minutes) during their characterization, likely due to the oxidation of silicene. Future work could explore the possible growth of silicene on non-metallic surfaces,5 followed by gate dielectric encapsulation and gate stack pattering to realize top-gated silicene FETs.